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Ixia Platform Reference Manual Manual, Release 6.30

15-3

Ixia IRIG-B Auxiliary Function Device (AFD2)

To reset time stamps for a IRIG-B-connected system, the reset operation needs to 
be executed for the chassis chain, and not for the individual chassis.

Figure 15-3. Chassis Properties AFD2 - Time Source

.

Table 15-1. Chassis Properties, Time Source Tab

Section

Field/Control

Description

Time Source

Synchronous

IRIG-B (AFD2) 

IRIG-B Mode

B000

B000 is straight TTL serial output (from 
the IRIG-B receiver)

B120

B120 is amplitude modulation (AM) (from 
the IRIG-B receiver)

IRIG-B Status

Lock Status

Locked = locked to IRIG-B 1PPS input 
(from IRIG-B receiver)

UTC Time

UTC Time (display only) in HH:MM:SS 
comes from the IRIG-B receiver

Day

Increments from 1 to 366

Control Flags

These are vendor-specific flags that are 
passed-through from the IRIG-B receiver

unless the sync cable is disconnected.

If set to Synchronous time source, a chassis 
connected to IRIG-B does not operate properly 

Содержание AFD2

Страница 1: ...IA AFD2 with integrated IRIG B is designed to provide 12 5 MHz GPS clock with a programmable 80 ns sync pulse to the Optixia chassis The Ixia AFD2 IRIG B receiver is controlled by an Ixia chassis thro...

Страница 2: ...y latency measurements by subtraction of the transmit time stamp from the receive time stamp For large or very remote chassis chains the chassis chain properties provide an offset delay This delay is...

Страница 3: ...e Source Synchronous IRIG B AFD2 IRIG B Mode B000 B000 is straight TTL serial output from the IRIG B receiver B120 B120 is amplitude modulation AM from the IRIG B receiver IRIG B Status Lock Status Lo...

Страница 4: ...n of IRIG B as the timer source the IRIG B status is displayed In Figure 15 3 on page 15 3 the status is locked to the 1PPS signal coming from the IRIG B receiver In the chassis tree view of IxExplore...

Страница 5: ...fore Attaching AFD2 Changing Time Source Any time the clock source is switched IxServer must be restarted When the chassis is switched from Synchronous time source to IRIG B or vice versa the followin...

Страница 6: ...e there is no IRIG B information and the status is Unlocked in the Time Sources tab of Chassis Properties in IxExplorer Figure 15 3 on page 15 3 then one of the following conditions needs to be correc...

Страница 7: ...d by one or more Ixia software users located likewise anywhere in the world Where IRIG B and CDMA sources are used all of the sources must have good quality time values in order for the trigger to be...

Страница 8: ...B Tb Time Absolute T Time Error at any site Terr Lab Ta T1 Tb Lba Tb T2 Ta Delta L Lab Lba Delta L Ta T1 Tb Tb T2 Ta Delta L T1 T2 2 Ta Tb Delta L 2 Ta Tb If Ta T Terr and Tb T Terr Then Delta L 2 T...

Страница 9: ...nd heartbeat is being generated by the IRIG B hardware Pwr OK Green The AFD2 power has been validated Lock Green Indicates that the internal PLL has locked to the 1PPS signal Testing is invalidated if...

Страница 10: ...level shift pulse width coded with BCD CF control functions SBS IRIGB120 1kHz carrier sine wave amplitude modulated with BCD CF control functions SBS Clock 12 5 Mhz GPS System clock Pulse Width 80 ns...

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