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iWave Systems Technologies Pvt. Ltd.
RZ/G1E SODIMM Development Platform Hardware User Guide
2.7.2
JTAG Header
A customized 20-pin ARM JTAG connector is available in RZ/G1E SODIMM carrier board for debug purpose. JTAG
connector (J18) is physically located at the bottom of the board as shown below.
Figure 15 JTAG Header
Table 10: JTAG Header
Pin
No
Signal Name
Signal Type /
Termination
Description
1
VCC_3V3
O, 3.3V Power
VREF reference Voltage.
2
VCC_3V3
O, 3.3V Power
Supply Voltage.
3
TRST#
I, 3.3V CMOS
JTAG test reset signal.
4
GND
Power
Ground.
5
TDI
I, 3.3V CMOS
JTAG test data Input
.
6
GND
Power
Ground.
7
TMS
I, 3.3V CMOS/
10K PU
JTAG test mode select.
8
GND
Power
Ground.
9
TCK
I, 3.3V CMOS/
10K PD
JTAG test clock.
10
GND
Power
Ground.
11
-
10K PD
This pin is connected to ground through 10K
pull down resistor.
12
GND
Power
Ground.