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iWave Systems Technologies Pvt. Ltd.
RZ/G1E SODIMM Development Platform Hardware User Guide
Pin
No.
SODIMM Edge Connector Signal
Name
Signal Type/
Termination
Description
74
HSCIF1_HSCK(GP4_10)
IO, 3.3V CMOS
HSCIF1 High Speed Serial Communication
Interface
clock
(Or)
General
Purpose
Input/Output. This pin is connected to GPIO
Header J16 Pin 09.
75
UART0_RTS
I, 3.3V CMOS
UART Ready to receive data.
HSCIF1_HRTS(GP4_12) UART signal from
RZ/G1E CPU is available in this pin
This pin is connected to DATA UART Header
J11 Pin 02.
76
USB0_OVC(GP5_25)
O, 3.3V CMOS
10K PU
USB0 OTG port over current sense.
This pin is connected from USB OTG Over
current indicator.
77
MSIOF0_SS1(GP4_6)
O, 3.3V CMOS
MSIOF0 frame synchronization signal1 or GPIO
for USB OTG ID to identify Host & Device.
This pin is connected from Micro USB OTG
connector J6 ID Pin.
78
USB0_PWEN(GP5_24)
I, 3.3V CMOS
General Purpose Input/Output.
Note: This pin is optionally connected to USB
OTG Power enable through resistor and
default not populated.
79
GND
Power
Ground.
80
MSIOF0_SS2(GP4_7)
IO, 3.3V CMOS
MSIOF0 frame synchronization signal2 (or)
General Purpose Input/Output.
This pin is connected to GPIO Header J16 Pin
12.
81
USB0_DP
IO, DIFF
USB OTG data positive.
This pin is connected to Micro USB OTG
connector J6.
82
NC
-
NC in carrier board.
SD0_WP(GP6_7) signal from RZ/G1E CPU is
available in this pin.
83
USB0_DM
IO, DIFF
USB OTG data negative.
This pin is connected to Micro USB OTG
connector J6.
84
NC
-
NC in carrier board.
GPIO(GP2_29) signal from RZ/G1E CPU is
available in this pin.
85
NC
-
NC in carrier board.
GPIO(GP2_31) signal from RZ/G1E CPU is
available in this pin.