IOtech DaqBoard/500, Справочник по аппаратуре

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Note: Specifications subject to change without notice.
DaqBoard/500 Series
9 69293
Specifications 6-3
Analog Outputs
DaqBoard/500 Only
Channels 2; two clocked DACs designated as DAC0 and DAC1
Resolution: 16 bit
Output Voltage Ranges: ±10 V
Settling time to 0.006%
of FSR:
10 µsec for 20 V step
Differential Linearity: ± 0.25 LSB @ 25° guaranteed monotonic
Accuracy: ± 0.001 V
Data Storage: Internal FIFO/PC Memory
Clock/Update Sources:
o
Asynchronous
o
Internal Pacer
o
External TTL
Max update rate/channel 100khz
Waveform Triggering:
o
Software Command
o
External Trigger TTL
Output Current: ±5 mA
Digital Inputs / Outputs
Channels 24 accessible from main I/O connector
Ports 3x8-bit Ports
I/O Direction Select: Software selectable per three 8-bit ports
(Ports A,B, and C)
Input Level: 5.0V/3.3V CMOS/LSTTL compatible
with 4.7 K ohm pull-up resistor
High Level Input Voltage: 2 V min.
Low Level Input Voltage: 0.8 V max.
High Level Output
Voltage:
2.4 V
Low Level Output
Voltage:
0.4 V
Maximum Output
Current: Low: 12 mA (sinking)
High: 12 mA (sourcing)