ICM-30630
Page 11 of 18
Document Number: AN-000023
Revision: 1.1
3.4
SERIAL INTERFACE DIGITAL LINE TERMINATIONS
The ICM-30630 has one master I
2
C, one slave I
2
C (shared with slave SPI) and one slave SPI (shared with slave I
2
C) serial
interface available for sensor and AP communications. I
2
C is a two-wire interface comprised of the signals serial data
(SDA) and serial clock (SCL). The lines are open-drain and pullup resistors (e.g. 10kΩ) are required.
3.4.1
Slave I
2
C interface
The ICM-30630 always operates as a slave device when communicating with the AP (master).
The slave address of the ICM-30630 is 7 bits long with the LSB (X) determining the final address. The LSB bit of
the 7-bit address is determined by the logic level on Pin AD0 (GND or VDDIO). The slave address is 0x6A (Pin AD0
is logic low) and 0x6B (Pin AD0 is logic high).
To use ICM-30630 in slave I
2
C mode, Pin 22 (nCS) must be set to the same level as VDDIO. Figure 9 shows the
ICM-30630 operating in slave I
2
C mode with its 7-bit device address set to 0x6A.
The I
2
C open-drain pullup resister value can be adjusted based on how many slave devices are connected and the
bus speed. The 10K ohm in the below circuit is just for reference. When the bus in fast and fast-plus mode, please
reference the Table 1 for the pullup resisters value.
Fscl = 400KHz
Fscl = 1MHz
Vddio (V)
Rp (min.) KOhm
0.867
0.867
3.0
0.480
0.480
1.8
Rp (max.) KOhm
2.356
1.131
3.0
2.548
1.223
1.8
Table 1. I2C Bus Pullup Resistor Value Reference Table
Figure 9. ICM-30630 Operating in Slave I
2
C Mode
SCL
SDA
From
Application
Processor
I2C(M)
SPI/I2C(S)
GPIOs
CLOCK
PROGRAMMING
DEBUGGING
PWRs
U1
ICM-30630
RESETL
1
RESV
2
RESV
3
RESV
4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL
7
VDDIO
8
SDO/AD0
9
REGOUT
10
FSY NC/GPIO1
11
GPIO2
12
VDD
13
RESV
14
VDD1P2
15
XTALO
16
XTALI
17
GND
18
GPIO0
19
RESV
20
AUX_DA
21
nCS
22
SCL/SCLK
23
SDA/SDI
24
R32
10K
R33
10K
VDDIO
VDDIO
GND
From the AP
