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Application Note 1662

2

AN
16

6

2

.0

O

cto

be

r 11
, 2

011

ISL97682IRTZEVALZ Evaluation Board Schematic

L1

15µH

D1

PMEG6030

1

3

2

SW1

1

3

2

SW2

R1

150k

R2

100k

When

SW1 = SW2 = 1: Fsw = 1.2MHz, WITH phase shift

SW1 = SW2 = 3: Fsw = 600kHz, WITH phase shift
SW1 = 1, SW2 = 3: Fsw = 1.2MHz, WITHOUT phase shift
SW1 = 3, SW2 = 1: Fsw = 600kHz, WITHOUT phase shift

C1
10µF/50V

C2
0.1µF/50V

P1

PVIN

C4

1µF/16V

P3

EN

P4

PWMI

VDC

C5

4.7µF/

C6

4.7µF/

C7
NC

C8
NC

LED1

LED25

LED2

LED26

LED3

LED27

LED4

LED28

LED5

LED29

LED6

LED30

LED7

LED31

LED8

LED32

LED9

LED33

LED10

LED34

LED11

LED35

LED12

LED36

JP2

I_OUT

JP3

JP5

R4

10k

R3

357k

C10

3.3nF/50V

C9

100pF/50V

JP7

JP9

JP11

JP12

C13

1nF/50V

C11
1nF/50V

R5 1M

R6

0

R7

Open

R8

5k

R9

10k

C15
8.2nF

C3
33pF

TP1

LX

TP2

VOUT

TP3

CH1

TP5

CH3

VD

C

P5

AGND

P6

AGND

P7

AGND

P8

AGND

P9

PGND

P10

PGND

2-layer board. Connect top layer PGND and bottom
 layer AGND 

F1

2A Fuse

JP14

R11

100k

R10

0

R13

Open

R12

27k

JP15

JP17

EN can be connected in the following ways to enable/disable
the device:
(1) Connected it to VIN directly on JP1 to enable
(2) Connected it to GND directly on JP1 to disable
(3) Directly apply external voltage on P3(EN) to enable/disable the

 device without putting shunt on JP1.

JP2: For measuring total output current
JP3-JP6: For measuring current on CH1-CH4 respectively
JP7-JP10, JP13-JP16: For easy configuration of 8x LED or 10x LED per string

JP19

TP8

RSET

TP9

FSW/PHS

P2

VIN

VDC

1

3

2

JP1

1

3

2

JP20

VDC

NC 16

AGND

1

COMP

2

RS

ET

3

FS

W

4

PWMI

5

EN

6

VIN

7

FPWN/DPWM

8

LX

9

PG

N

D

10

VD

C

11

OV

P

12

CH1 13

NC 14

CH3 15

ISL97682

U2

U1

XAL6060-153MEB

50V

50V

Содержание ISL97682IRTZEVALZ

Страница 1: ...e provided for easily adjust the LED maximum DC current Please refer to the ISL97682IRTZEVALZ Evaluation Board Schematic on page 2 for more details LED dimming frequency and duty cycle As mentioned in step 4 above when the shunt on JP20 is connected to the upper position FPWM DPWM pin is connected to VDC the device enters direct PWM mode which means both the LED dimming frequency and the duty cycl...

Страница 2: ...R9 10k C15 8 2nF C3 33pF TP1 LX TP2 VOUT TP3 CH1 TP5 CH3 VDC P5 AGND P6 AGND P7 AGND P8 AGND P9 PGND P10 PGND 2 layer board Connect top layer PGND and bottom layer AGND F1 2A Fuse JP14 R11 100k R10 0 R13 Open R12 27k JP15 JP17 EN can be connected in the following ways to enable disable the device 1 Connected it to VIN directly on JP1 to enable 2 Connected it to GND directly on JP1 to disable 3 Dir...

Страница 3: ...Application Note 1662 3 AN1662 0 October 11 2011 PCB Layout FIGURE 1 TOP SILKSCREEN LAYER TOP LAYER ...

Страница 4: ...Application Note 1662 4 AN1662 0 October 11 2011 FIGURE 2 BOTTOM LAYER PCB Layout Continued ...

Страница 5: ...capacitors C2 0 1µF 50V 603 C3 33pF 603 C4 1µF 16V 603 C5 4 7µF 50V 1210 Murata GRM32ER71H475KA88L C6 4 7µF 50V 1210 C7 Place Holder 1210 Not Populated C8 Place Holder 1210 C9 100pF 50V 603 General purpose Ceramic X5R X7R capacitors C10 3 3nF 50V 603 C11 1nF 50V 603 C12 Place Holder 603 C13 1nF 50V 603 C14 Place Holder 603 C15 8 2nF 603 F1 2A Fuse 1206 Bel Fuse Inc C1Q 2 U1 QFN16 3MM Intersil ISL9...

Страница 6: ... TEST POINT Keystone Electronics 5010 TP2 VOUT TEST POINT TP3 CH1 TEST POINT TP4 CH2 TEST POINT TP5 CH3 TEST POINT TP6 CH4 TEST POINT TP7 VDC TEST POINT TP8 RSET TEST POINT TP9 FSW PHS TEST POINT P5 AGND TEST POINT Keystone Electronics 5011 P6 AGND TEST POINT P9 PGND TEST POINT P1 PVIN POWERPOST Mill Max 3156 1 00 00 00 00 08 0 P2 VIN POWERPOST P3 EN POWERPOST P4 PWMI POWERPOST P7 AGND POWERPOST P...

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