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4

AN1386.1

December 23, 2009

Efficiency and Output 

Ripple/Noise Measurement

Figure 5 shows the efficiency measurement schematic for 
the ISL820xMEVAL1Z POL module. The voltage and 
current meter can be used to measure input/output 
voltage and current. In order to obtain an accurate 
measurement and prevent the voltage drop of PCB or 
wire trace, the voltage meter must be close to the 
input/output pin of the POL module.

The efficiency equation is shown in Equation 1:

The equipment setup for the efficiency measurement on 
the evaluation board is shown in Figure 6. The measuring 
point for the input voltage meter is at the C

3

 terminal, 

and the measuring point for the output voltage meter is 
at the C

8

 terminal (refer to Figure 9).

Output Ripple/Noise Measurement Method

The total noise is equal to the sum of the ripple and 
noise components. Simple steps should be taken to 
assure that there is minimum pickup noise due to the 
high frequency events, which can be magnified by the 
large ground loop formed by the oscilloscope probe 
ground. This means that even a few inches of ground 
wire on the oscilloscope probe may result in hundreds of 
millivolts of noise spikes when improperly routed or 
terminated. This effect can be overcome by using the 
short loop measurement method to minimize the 
measurement loop area for reducing the pickup noise. 
The short loop measurement method is shown in 
Figure 7. For ISL820xMEVAL1Z evaluation board, the 
output ripple/noise measurement point is located at the 
C

8

 terminal (refer to Figure 9).

Efficiency

Output Power

Input Power

------------------------------------

P

OUT

P

IN

----------------

V

OUT

I

OUT

(

)

V

IN

I

IN

(

)

----------------------------------------

=

=

=

(EQ. 1)

FIGURE 5. EFFICIENCY MEASUREMENT SCHEMATIC

PVCC

VIN

VOUT

Cin

Cout

R

FB

R

SEN-EX

C

PVCC

+

-

DC Source

DC Load

Vi

Ai

Vo

+

-

DC Source

Iin

Vin

Vout

Iout

PGND

FB

COMP/EN

VIN

VOUT

PHASE

ISET

PVCC

ELECTRONIC LOAD

Vin

DC POWER SUPPLY

PVCC

DC POWER SUPPLY

Current

 Meter

Voltage

 Meter

Voltage

 Meter

+

-

+

-

FIGURE 6. EQUIPMENT SETUP FOR EFFICIENCY 

MEASUREMENT

SHORT LOOP

MEASUREMENT

METHOD

FIGURE 7. OUTPUT RIPPLE/NOISE 

MEASUREMENT METHOD

Application Note 1386

Содержание ISL8201M

Страница 1: ...tic 3 Efficiency and Output Ripple Noise Measurement 4 Schematic 5 Bill of Materials 6 Printed Circuit Board Layer 7 List of Figures Evaluation Board of POL Module 2 Quick Start 3 Quick Start Schematic 3 Wide Input Range Schematic 3 Efficiency Measurement Schematic 4 Equipment Setup for Efficiency Measurement 4 Output Ripple Noise Measurement Method 4 Schematic 5 Top Over Layer Component Location ...

Страница 2: ...tion The user can easily set the output voltage by changing the value of R1 refer to Figure 8 Installation Recommended Operating Specification The recommended operating specification for input output and PVCC bias range is shown as Table 2 Table 3 lists the typical application s various output voltages and its corresponding resistance FIGURE 1 EVALUATION BOARD OF POL MODULE TABLE 1 TEST EQUIPMENT ...

Страница 3: ...n board delivers power to the Electronic Load If the input voltage is 5V or 12V the PVCC bias does not require additional supply and it can connect to the input side directly by pushing switch S1 to the up state Figure 3 shows the ISL820xMEVAL1Z application schematic for 5V or 12V input voltage The PVCC pin can connect to the input supply directly Typical Application Schematic Typical Application ...

Страница 4: ... due to the high frequency events which can be magnified by the large ground loop formed by the oscilloscope probe ground This means that even a few inches of ground wire on the oscilloscope probe may result in hundreds of millivolts of noise spikes when improperly routed or terminated This effect can be overcome by using the short loop measurement method to minimize the measurement loop area for ...

Страница 5: ...EVAL1Z has integrated 4 12kΩ and ISL8204MEVAL1Z has integrated 2 87kΩ 4 R18 C18 and C19 are the snubber network which can reduce the stress for internal semiconductor 5 R13 R14 C12 C13 C14 and C15 are the external compensation network The ISL820xMEVAL1Z has integrated the type 3 compensation network inside the module for typical applications 6 R15 R16 R17 R20 R21 C17 Q2 and Q3 are the power up seq...

Страница 6: ...10µF 25V MURATA TDK C5 Capacitor POS Capacitor 330µF 6 3V SANYO C5A Capacitor Not installed C6 Capacitor Not installed C6A Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C7 Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C7A Capacitor Not installed MURATA TDK C8 Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C8A Capacitor Not installed C9 Capacitor Not installed C10 Capacitor Ceramic Capacitor 1...

Страница 7: ...7 AN1386 1 December 23 2009 Printed Circuit Board Layers FIGURE 9 TOP OVER LAYER COMPONENT LOCATION FIGURE 10 TOP LAYER COMPONENT SIDE Application Note 1386 ...

Страница 8: ...8 AN1386 1 December 23 2009 FIGURE 11 MIDDLE 1 LAYER FIGURE 12 ISL820xMEVAL1Z MIDDLE 2 LAYER Printed Circuit Board Layers Continued Application Note 1386 ...

Страница 9: ...tioned to verify that the Application Note or Technical Brief is current before proceeding For information regarding Intersil Corporation and its products see www intersil com AN1386 1 December 23 2009 FIGURE 13 BOTTOM LAYER COMPONENT SIDE MIRRORED FIGURE 14 BOTTOM OVER LAYER COMPONENT LOCATION MIRRORED Printed Circuit Board Layers Continued Application Note 1386 ...

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