6
ISL6539EVAL1 Customization
There are numerous ways in which a designer might modify
the ISL6539EVAL1 evaluation board for differing
requirements. Some of the changes which are possible
include:
• The output inductors, L1 and L2, for the V
DDQ
and V
TT
regulators, respectively.
• The input capacitance may be changed. The evaluation
board is shipped with two 10µF ceramic capacitors, C2
and C3, as the input capacitance. A spot has been set
aside for the installation of a 10mm diameter through hole
aluminum electrolytic capacitor in location C1.
• The output capacitance of either regulator may be
modified. The evaluation board is shipped with one 220µF
capacitor on the output of each regulator. There are two
empty locations, C13 and C24, available for the V
DDQ
regulator and one empty location, C15, available for the
V
TT
regulator.
• The overcurrent trip point of the V
DDQ
regulator,
programmed through the OCSET resistor, R9. Refer to the
ISL6539 datasheet for details on this.
• Changing the value of C20 will alter the rise time of the
outputs during soft-start. Refer to the ISL6539 datasheet
for details on this.
• The load capacity for either rail can be increased by
exchanging the MOSFETs, U2 and U3, for ones with
higher current handling capabilities. The ISEN resistor
values, R4 and R5, may need to be modified if this is
done. The overcurrent resistor value, R9, would also have
to be reviewed. Refer to the ISL6539 datasheet for details
on calculating the values of these resistors.
• The output voltage of the V
DDQ
regulator may be modified
by changing resistor R10. Refer to the ISL6539 datasheet
for details on this.
• The percentage at which the V
TT
rail and the V
REF
voltage track the V
DDQ
rail can be modified by altering the
resistor divider set up by resistors R11 and R14.
Conclusion
The ISL6539EVAL1 is a versatile platform that allows
designers to gain a full understanding of the functionality of
the ISL6539 in a DDR memory system. The board is also
flexible enough to allow the designer to modify the board for
differing requirements. The following pages provide a
schematic, bill of materials, and layout drawings to support
implementation of this solution.
References
For Intersil documents available on the web, see
http://www.intersil.com/
[1]
ISL6539 Data Sheet,
Intersil Corporation, File No.
FN9144.
Application Note 1278