Intel ATX 3.0, Руководство по конструкции

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Electrical
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Output Capacitive Load (
μ
F)
+5VDC 3,300
+3.3VDC 3,300
-12VDC 330
+5VSB 3,300
4.2.7 Closed Loop Stability - REQUIRED
The power supply shall be unconditionally stable under all line/load/transient load
conditions including capacitive loads specified in Section 4.2.6 . A minimum of 45
degrees phase margin and 10 dB gain margin is recommended at both the maximum
and minimum loads.
4.2.8 +5V DC / +3.3V DC Power Sequencing - REQUIRED
The +12V1 DC / +12V2 DC and +5 VDC output levels must be equal to or greater
than the +3.3 VDC output at all times during power-up and normal operation. The
time between any output of +12V1 DC / +12V2 DC and +5 VDC reaching its minimum
in-regulation level and +3.3 VDC reaching its minimum in-regulation level must be ≤
20 ms as shown in Figure 4-2 .
Figure 4-2: Power Supply Timing