IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -8
Q301 : CS42518 (8-Ch Codec with S/PDIF Receiver)
BLOCK DIAGRAM
DTR-5.8
INT
DAC#1
DAC#2
DAC#5
DAC#4
DAC#3
DAC#6
DAC#7
DAC#8
AD1/CDIN
SDA/CDOUT
SCL/CCLK
VLC
OMCK
RMCK
SAI_LRCK
SAI_SCLK
SAI_SDOUT
VLS
ADCIN1
ADCIN2
CX_SDOUT
CX_LRCK
CX_SCLK
CX_SDIN1
CX_SDIN2
CX_SDIN3
CX_SDIN4
RXP0
RXP1/GPO1
RXP2/GPO2
RXP4/GPO4
RXP3/GPO3
RXP7/GPO7
RXP6/GPO6
RXP5/GPO5
MUTEC
FILT+
VQ
REFGND
VA
AGND
AINL+
AINL-
AINR+
AINR-
AOUTA1-
AOUTB1-
AOUTA2-
AOUTB2-
AOUTA3-
AOUTB3-
RST
AD0/CS
TXP
VARX
AGND
LPFLT
DGND DGND VD
VD
Analog Filter
Digital Filter
V
o
lume Control
ADC#1
ADC#2
DEM
ADC
Serial
Data
Digital Filter
Digital Filter
Gain & Chip
Gain & Chip
Internal MCLK
CODEC
Serial
Port
Rx
GPO
MUTE
C&U Bit
Data Buffer
Format
Detector
Clock/Data
Recovery
S/P DIF
Decoder
Ref
Control
Port
Mult/Div
Serial
Audio
Interface
Port
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