Application Note
12 of 19
001-87564 Rev.*D
2021-06-01
A Design Guide to SPI F-
RAM™ Processor Companion
- FM33256B
Pseudo Code Examples
r e s t r i c t e d
10
Pseudo Code Examples
A summary of the op-codes of FM33256B is given in
Table 1
Summary Table of Op-Codes
Name
Op-Code
Address
Data
Action
WREN
0000_0110b -
-
Sets WEL
WRITE 0000_0010b 2 bytes
Memory data in
Writes data to F-RAM array if WEL = 1.
When
CS
̅̅̅̅
goes HIGH, WEL is cleared.
READ
0000_0011b 2 bytes
Memory data out
Reads data from F-RAM array
WRDI
0000_0100b -
-
Clears WEL
RDSR
0000_0101b -
Status Register data out
Read WPEN, BP(1:0), WEL bits
WRSR
0000_0001b -
Status Register data in
Write WPEN and BP(1:0) bits
RDPC
0001_0011b 1 byte
Register data out
Companion/RTC register read
WRPC
0001_0010b 1 byte
Register data in
Companion/RTC register write
#define nvRAM_WREN 0x06
#define nvRAM_RTC_WRITE_CMD 0x12
#define nvRAM_RTC_READ_CMD 0x13
10.1
Enable RTC Oscillator
/**************************
Enable RTC Oscillator **************************/
data[0] = 0x00;
// Data for clearing the
OSCEN
̅̅̅̅̅̅̅̅̅
bit
WRITE_RTC (0x00,
// Sets the address to Register 00h
data,
// Writes data 0x00 which clears the
OSCEN
̅̅̅̅̅̅̅̅̅
bit
0x01);
// Number of bytes to be written
