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Application Note
13 of 53
V 1.0
2019-04-01
IM393 Application note
IM393 IPM Technical Description
Product overview and pin description
High-side bias voltage pins for driving the IGBT
Pins: VB(U) – VS(U) , VB(V) – VS(V), VB(W) – VS(W)
•
These pins provide the gate drive power to the high-side IGBTs.
•
The ability to utilize a bootstrap circuit scheme for the high-side IGBTs eliminates the need for external power
supplies.
•
Each bootstrap capacitor is charged from the V
DD
supply during the ON-state of the corresponding low-side
IGBT or the freewheeling state of the low-side freewheeling diode.
•
In order to prevent malfunctions caused by noise and ripple in the supply voltage, a good quality (low ESR,
low ESL) filter capacitor should be mounted very close to these pins.
Low-side bias voltage pin
Pin: VDD
•
This is the control supply pin for the internal IC.
•
In order to prevent malfunctions caused by noise and ripple in the supply voltage, a good quality (low ESR,
low ESL) filter capacitor should be mounted very close to this pin.
Low-side common supply ground pin
Pin: COM
•
This pin connects the control ground for the internal IC.
Signal Input pins
Pins: HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W)
•
These are pins to control the operation of the internal IGBTs.
•
They are activated by voltage input signals. The terminals are internally connected to a Schmitt trigger circuit
composed of 5 V-class CMOS.
•
The signal logic of these pins is active-high. The IGBT associated with each of these pins will be turned ON
when a sufficient logic voltage is applied to these pins.
•
The wiring of each input should be as short as possible to protect the IM393-XX against noise influences.
•
To prevent signal oscillations, an RC coupling is recommended as illustrated in Figure 4.1.
Over-current detection pin
Pin: ITRIP
•
The current-sensing shunt resistor should be connected between the pin N (emitter of low-side IGBT) and the
power ground to detect short-circuit current (refer to Figure 4.3). An RC filter should be connected between
the shunt resistor and the pin ITRIP to eliminate noise.
•
The integrated comparator is triggered if the voltage V
ITRIP
is higher than 0.49 V. The shunt resistor should be
selected to meet this level for the specific application. In case of a trigger event, the voltage at pin RFE is pulled
down to LOW.
•
The connection length between the shunt resistor and ITRIP pin should be minimized.