6ED family - 2nd generation
Technical Description
Application Note
16
Rev. 1.3, 2014-03-23
AN-EICEDRIVER-6EDL04-1
3.7
Protection
3.7.1
Overcurrent protection (ITRIP)
The current signal of the DC-link reference is measured in order to recognize overcurrent or halfbridge short
circuit events. A shunt resistor generates a voltage drop. A small RC-filter for attenuating voltage spikes is
recommended. Such spikes may be generated by parasitic elements in the practical layout. It is highly
recommended as considerations of good layout to avoid any joint PCB track of the ITRIP signal with the low
side emitter track or the COM track (see also section 3.10). If the voltage drop over the shunt is higher than
typically
V
IT,TH+
= 0.445 V, then the internal comparator is triggered according to Figure 12. This results in a
trigger current of
(3)
where R
SH
is the value of the shunt resistor.
The output of the comparator passes a noise filter, which inhibits an overcurrent shutdown caused by parasitic
voltage spikes. The typical filter time of the noise filter is
t
ITRIPMIN
= 210 ns. A set-dominant latch stores the
overcurrent event until it is reset by the signal provided from the RCIN circuit.
The ITRIP-comparator switches the discharging NMOS-FET at pin RCIN. The
R
DS(on)
of the FET is typically
54
Ω, so that there is a characteristical discharge curve in respect of the external capacitor C
RCin
. The time
constant is defined by the external capacitor C
RCin
and the
R
DS(on)
of the FET. The dischage phase ends, when
the comparator is low again. This corresponds to a voltage level at the comparator of
V
IT,TH+
-
V
IT,HYS
= 445 mV -
70 mV = 375 mV, where
V
IT,HYS
= 70 mV is the hysteresis of the ITRIP-comparator.
RCIN
I
RCIN
V
Z
=10.5V
ITRIP
SET
DOMINANT
LATCH
S
R
Q
INPUT
NOISE
FILTER
V
IT,TH+
=
0.445V
Comp.
COM
VSS
V
DD2
8V
NMOS
R
ON,RCIN
current source
VSS
V
CC
VCC
to /FAULT
6ED family
–
2nd generation
R
RCin
C
RCin
V
RCIN,TH
= 5.2V
V
RCIN,HYS
= 2.0V
to input
signal logic
V
IT,HYS
= 70mV
R
SH
R
F
C
F
Figure 12
Internal structure of the ITRIP and RCIN sections
It is important to note here, that due to a large external capacitance at pin RCIN and rather short occurrance of
overcurrent, the voltage at the capacitor C
RCin
is not below the thereshold of the RCIN Schmitt-Trigger. The
threshold of the Schmitt-Trigger
V
RCIN,TH
-
V
RCIN,HYS
= 5.2 V
– 2 V = 3.2 V lead to the result, that the set-dominant
latch is still in active reset and the IC might restart operation as soon as the voltage at pin ITRIP is in the
operative range again, which is
V
IT,TH+
-
V
IT,HYS
. If the trigger level at pin ITRIP is set closely to the maximum
operative current, then this behaviour acts as a soft overcurrent limitation. As long as the voltage at pin RCIN
does not hit the 3.2 V level of the Schmitt-trigger, the gate drive section restarts immediately after the
overcurrent vanishes. This may be after some pulse periods.
3.7.2
Failure reset (RCin)
The external circuit at pin RCIN defines the overcurrent recovery of the drive system. This circuit can consist of
a single capacitor C
RCin
according to Figure 12. There is also the option for a path to the supply voltage
V
CC
via
resistor R
RCin
. The fault-clear time
t
FLTCLR
is dependent on the re-charging of C
RCin
, because the system
