
Application Note
13 of 27
V 1.0
2021-04-30
CoolGaN™ IPS half-bridge evaluation board with IGI60F1414A1L
Setup and use
Figure 13
Measuring deadtime on the falling-edge of PWM
4.8
Initial checkout
After setting up the board per section 4.6, the next step adding the external inductor for desired test topology.
This example shows how to setup the board for buck topology testing. Before powering up, you may want to
observe the gate voltages.
shows an example of the gate voltage of low-side GaN transistor captured
from TP4. In this condition the PWM applied to the J1 is 36 percent for buck mode testing.
Figure 14
Low-side GaN transistor gate voltage waveform at 100 kHz