User Guide
4 of 11
002-34024 Rev. **
2021-10-05
AIROC™ CYW20835 Bluetooth® LE system on chip hardware design
guidelines
Component placement
2
Component placement
As a rule, follow the receive signal flow from the antenna to the antenna matching and filter circuits, then to the
low-noise amplifier (LNA) chip input. Keep the radio front end (RF), power management unit (PMU), and
baseband (BB) decoupling capacitors next to CYW20835 pin pads.
2.1
Antenna placement
Keep the antenna connection to the device as short as possible. Maintain a solid ground near the antenna and
adequate ground clearance for the layers beneath the antenna.
In the reference design, the antenna is on the top layer on the left of the board next to the CYW20835 chip.
2.2
PCB antenna
For more details on PCB antennas, see
AN91445 - Antenna design and RF layout guidelines
. For the
associated Gerber file, visit
https://www.cypress.com/go/AN91445
Figure 2
Antenna placement and microstrip clearance
2.3
Crystal placement
Protect the crystal and related traces from noise sources, and use a solid ground to separate the crystal from RF
traces. The crystal ground plane should have direct vias to the reference ground plane.
You can find the crystal specification requirements in the CYW20835 datasheet. See the reference design BOM
for the recommended vendor part numbers.