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IDT Installation of the EB4T4 Eval Board

EB4T4 Eval Board Manual

2 - 3

a

Notes

Power Sources

Power for the EB4T4 is generated from the 12.0V PCI Express upstream slot power or optionally from

3.3Vaux. A 12.0V to 3.3V DC-DC converter will be used to provide power to four DC-DC converters to
generate VDDcore, VDDpe, VDDpea, and VTT voltages. The 3.3V from the 12.0V converter is used to
power VDDio. When in power down mode the DC-DC converters is powered directly from 3.3Vaux through
a MOSFET switch.

Figure 2.2 Power Distribution Block Diagram

Vaux Support

Power supply support will be provided to EB4T4 from 12.0V upstream power to 3.3Vaux upstream

power when in sleep mode. The WAKE# signal direction, both an input and output will be supported by
jumper selection. The APWRDIS# signal for auxiliary power disable requires the following timing on power-
up:

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Содержание EB4T4 Eval Board

Страница 1: ...ilver Creek Valley Road San Jose California 95138 Telephone 800 345 7015 408 284 8200 FAX 408 284 2775 Printed in U S A 2007 Integrated Device Technology Inc IDT 89EBPES4T4 Evaluation Board Manual Eva...

Страница 2: ...ure Analysis be performed LIFE SUPPORT POLICY Integrated Device Technology s products are not authorized for use as critical components in life support devices or systems unless a specific written agr...

Страница 3: ...ermination Voltage Converter 2 5 PCI Express Digital Power Voltage Converter 2 5 PCI Express Analog Power Voltage Converter 2 5 Core Logic Voltage Converter 2 5 3 3V I O Power Module 2 5 Power up Sequ...

Страница 4: ...IDT Table of Contents EB4T4 Eval Board Manual ii August 20 2007 Notes...

Страница 5: ...Table 2 4 Downstream Reset Selection 2 6 Table 2 5 Boot Configuration Vector Signals 2 6 Table 2 6 Boot Configuration Vector Switches S3 and S5 ON 0 OFF 1 2 7 Table 2 7 JTAG Connector Pin Out 2 7 Tab...

Страница 6: ...IDT List of Tables EB4T4 Eval Board Manual iv August 20 2007 Notes...

Страница 7: ...07 List of Figures Figure 1 1 Function Block Diagram of the EB4T4 Eval Board 1 1 Figure 2 1 Clock Distribution Block Diagram 2 2 Figure 2 2 Power Distribution Block Diagram 2 3 Figure 2 3 APWRDIS Timi...

Страница 8: ...IDT List of Figures EB4T4 Eval Board Manual vi August 20 2007 Notes...

Страница 9: ...al board is designed to function as an add on card to be plugged into a x1 PCIe slot available on a motherboard hosting an appro priate root complex microprocessor s and three downstream ports The EB4...

Страница 10: ...for each downstream port to initiate a hot swap event on each port Four pin connector for optional external power supply Push button for Warm Reset Several LEDs to display status reset power Attention...

Страница 11: ...provides fan out and switching functions between a PCI Express upstream port and three down stream ports or peer to peer switching between downstream ports The EB4T4 has three PCI Express downstream p...

Страница 12: ...e upstream reference clock should be used instead The output of the onboard clock generator is accessible through two SMA connectors located on the Evaluation Board See Table 2 3 This can be used to c...

Страница 13: ...TT voltages The 3 3V from the 12 0V converter is used to power VDDio When in power down mode the DC DC converters is powered directly from 3 3Vaux through a MOSFET switch Figure 2 2 Power Distribution...

Страница 14: ...g On initial power up APWRDIS must be held low initially for 8 clocks after PERST is removed Then it must be sampled high 256 clocks after PERSTN is removed to enable L2 mode Subsequent PERST will not...

Страница 15: ...requirements To insure that the sequencing requirements are met a 0 047 F is used at the SOFTSTART cap on the VTTPE s voltage converter U6 pin 36 in the EB4T4 Required Jumpers To deliver power to the...

Страница 16: ...reset PERST default 2 W7 1 2 Software controlled reset through GPIO0 2 3 Fundamental reset PERST default Table 2 4 Downstream Reset Selection Signal Description CCLKDS Common Clock Downstream When th...

Страница 17: ...or initialization and the I O expander used for hot plug signals The bus address for the selected EEPROM device is 0b1010011 by default The PES4T4 provides a JTAG connector J4 for access to the PES4T4...

Страница 18: ...der 2 3 Shunted 1 2 Port 2 12V source base on hot plug controller 2 3 Port 2 12V source from upstream port power W30 Header 2 3 Shunted 1 2 Port 2 3 3Vaux source base on hot plug controller 2 3 Port 2...

Страница 19: ...ndicator DS85 Green Port 4 Power is good indicator DS83 Amber Port2 Attention Input indicator DS82 Amber Port3 Attention Input indicator DS81 Amber Port4 Attention Input indicator DS79 Green Port2 Pre...

Страница 20: ...p 6 SMDAT SMBus Data JTAG TDI Test Data Input 7 GND Ground JTAG TDO Test Data Output 8 3 3V 3 3V power JTAG TMS Test Mode Select 9 JTAG1 TRST Test Reset resets JTAG i f 3 3V 3 3V power 10 3 3Vaux 3 3V...

Страница 21: ...2V 12V power 4 GND Ground GND Ground 5 SMCLK SMBus clock JTAG2 TCK Test Clock JTAG i f clk i p 6 SMDAT SMBus Data JTAG TDI Test Data Input 7 GND Ground JTAG TDO Test Data Output 8 3 3V 3 3V power JTAG...

Страница 22: ...ownstream ports According to the PCI Express specification the PRSNT1 pin should be wired to the farthest available PRSNT2 pin on the connector In the EB4T4 all PRSNT2 pins are tied together This allo...

Страница 23: ...configuration file into an EEPROM programmable data structure This enables the user to program an appropriate serial EEPROM with desirable register settings for the PES4T4 and then to populate that EE...

Страница 24: ...IDT Software for the EB4T4 Eval Board EB4T4 Eval Board Manual 3 2 August 20 2007 Notes...

Страница 25: ...Notes EB4T4 Eval Board Manual 4 1 August 20 2007 Chapter 4 Schematics Schematics...

Страница 26: ...APWRDISN TIMING CIRCUIT RESET SMBUS JTAG DIPSW CLOCKS POWER MOSFETS FOR 3 3VAUX 1 SHEET Mon Jun 18 16 31 49 2007 SHEET 1 OF 17 J Carrillo 2007 STGSCH 00117 D Huang 1 0 18 637 001 89EBPES4T4 Evaluatio...

Страница 27: ...UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF DNP NA NA DNP DNP DNP DNP DNP NA YEL NA DNP DNP NA 1K 0 16V 10UF 0 0 DNP DNP DNP NA DNP 2K 1 DNP NA DNP NA DNP DNP DNP 2K 1 NA DNP 0 015UF 10V 47UF 1 499 YEL 1K 0 0 22...

Страница 28: ...487 1 DNP 1K 5 5 15 1K 5 15 5 487 1 15 5 5 15 1 487 1 487 DNP 1 487 1 487 DNP 487 1 1K 5 15 5 5 15 1K 5 1 487 47UF 10V 487 1 487 1 47UF 10V DNP 1K 5 5 15 5 15 1K 5 15 5 15 5 487 1 487 1 487 1 47UF 10V...

Страница 29: ...1 49 9 1 49 9 1 49 9 1 49 9 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 0 1UF 475 CLOCKS DNP 0 0 0 0 YEL YEL 49 9 49 9 49 9 0 1UF 0 1UF 0 1UF YEL YEL 0 01UF 5 10 22 1 1 22 1 1 22 1 1 0 1UF 5 5 22 5 5 1...

Страница 30: ...DUT_JTAG_TCK DUT_JTAG_TMS DUT_JTAG_TDO DUT_JTAG_TDI 1K PERSTN PWR_SDA PWR_SCL 1K 5 5 1K 1K 1K RESET JTAG SMBUS DIPSW MSMBDAT MSMBCLK PERSTN DUT_JTAG_TRST_N SWMODE0 RSTHALT DIP_APWRDISN SWMODE2 SWMODE1...

Страница 31: ...0M PCBB ROHS 0 1UF APWRDSIN TIING CIRCUIT APWRDISN 0 1UF 0 1UF 0 1UF 5 22 0 1UF 5 10K 10K 1 1UF 25V DIP_APWRDISN PERSTN TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P N 1 1 A A B...

Страница 32: ...U_WAKEN_IN 0 0 S3_WAKEN YEL YEL 10K 1 10K 1 1 10K 1 10K 1 10K 1 10K 1 10K 1 10K 1 10K 0 1UF 5 10K 0 1UF 0 1UF 10K 5 5 10K P2MRLIN P3MRLIN P4MRLIN P2ATTNIN P3ATTNIN P4ATTNIN S2_WAKEN S4_WAKEN EEPROM A...

Страница 33: ...1 1 0 1UF 5 2 7K NA DNP 0 0 0 0 5 2 7K 5 2 7K MAX7311AUG 0 1UF IOEXP2_INTN P2_LINKUPN P3_LINKUPN P0_ACTIVEN P3PWRGOODN P4_ACTIVEN P2_ACTIVEN P3_ACTIVEN P0_LINKUPN P4PWRGOODN P2PWRGOODN MSMBCLK MSMBDAT...

Страница 34: ...70 R869 DS95 DS94 DS93 R856 R855 R854 DS91 DS90 DS89 10 8 11 8 10 8 15 8 15 8 16 8 P2PWRFLTN P3PWRFLTN P4PWRFLTN P2PRDETN P3PRDETN P4PRDETN 8 7 8 7 8 7 8 8 8 8 8 8 8 8 8 8 8 8 8 7 8 7 8 7 8 10 4 8 11...

Страница 35: ...5 10K DNP 0 0 DNP DNP 0 0 0 53R 1120 000 MIC2592B_2YTQ 0 01UF 0 01UF YEL 10K 5 10K 5 YEL S4_12V S2_12V S2_3V P2PWRGOODN P4PWRFLTN P4PWRGOODN P2PWRFLTN S2_3VAUX S4_3VAUX S2_FORCE_ON P4PWREN PWR_SDA PW...

Страница 36: ...UF 25V 0 1UF 47UF 10V 1 110K 5 10K 10K 5 10K 5 5 10K 5 10K 5 10K 0 DNP DNP 0 0 DNP MIC2592B_2YTQ 53R 1120 000 0 01UF 0 01UF 0 10K 5 5 10K P3PWRFLTN P3PWRGOODN S3_3V S3_12V S3_3VAUX PWR_SCL PWR_SDA S3_...

Страница 37: ...ISN PEREFCLK0N PEREFCLK0P RSTHALT 89HPES4T4ZBBCG MSMBDAT DUT_JTAG_TCK DUT_JTAG_TDI DUT_JTAG_TDO DUT_JTAG_TMS DUT_JTAG_TRST_N IOEXP0_INTN 89HPES4T4ZBBCG P3RSTN TITLE DRAWING NO AUTHOR CHECKED BY COPYRI...

Страница 38: ...13 PES4T4 PORT 0 EDGE CONN DNP NA 25V 10UF 25V 6 8UF 25V 10UF 25V 6 8UF 89HPES4T4ZBBCG 0 1UF 0 1UF U_PETP0 U_PETN0 U_PERP0 U_PERN0 TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P...

Страница 39: ...2_PERP0 S4_PETN0 S4_PETP0 S3_PETN0 S3_PETP0 0 1UF S2_PETN0 S2_PETP0 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF PES4T4 DOWNSTREAM PORTS TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P N 1 1 A A...

Страница 40: ...RP0 S3_REFCLKN S3_PETN0 S3_PETP0 S3_WAKEN U_PERSTN S3_RSTN S3_PERN0 P2RSTN U_PERSTN S2_RSTN P3PRDETN S3_12V S3_3VAUX S3_3V S2_3V S2_12V S2_3VAUX S2_PERN0 S2_PERP0 S2_REFCLKN S2_REFCLKP S2_RSTN P2PRDET...

Страница 41: ...PETP0 S4_WAKEN P4PRDETN S4_3V S4_12V S4_PERN0 S4_REFCLKP S4_RSTN 5 1K 5 108051 301AC 10UF 25V 25V 10UF 25V 10UF 10UF 25V 0 0 PORT 4 TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P...

Страница 42: ...0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 47UF 10V 47UF 10V 10V 47UF 0 1UF 0 1UF 0 1UF 0 1UF 1UF 16V 0 1UF 0 1UF 0 1UF 0 1UF 47UF 10V 47UF 10V 0 1UF 16V 1UF DUT_3_3V DUT_VTT DU...

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