14
REVISION C 09/29/14
82P33731/33831 EVALUATION BOARD
Figure 15. Output Frequencies Entered after APLL1/APLL2 Configured (example)
◦
To configure APLL3, select the correct clock path and enter desired output frequencies in OUT11 and/or OUT12. Only
OUT11 and OUT12 are from APLL3. Please see portion of the window configuring APLL3 in
Figure 16
below. Writing
to APLL3-related registers requires an additional step. Refer to Step 8 (
Figure 19
and
Figure 20
) below for details.
Figure 16. Configure APLL3 by selecting a proper clock path and enter desired frequencies in OUT11 and
OUT12
