NOVA-7896/7896FW Socket 370 Celeron
TM
& Pentium III
®
Multimedia & Dual Ethernet ,IEEE1394, Embedded Board
69
Appendix A. Watch-Dog Timer
The Watchdog Timer is a device to ensure that standalone systems can
always recover from abnormal conditions that cause the system to crash.
These conditions may result from an external EMI or a software bug.
When the system stops working, hardware on the board will perform
hardware reset (cold boot) to bring the system back to a known state.
Three I/O ports control the operation of Watch-Dog Timer.
443 (hex)
Write
Set Watchdog Time period
443 (hex)
Read
Enable the refresh the Watchdog Timer.
043/843 (hex) Read
Disable the Watch-Dog Timer.
Prior to enable the Watch-Dog Timer, user has to set the time-out period.
The resolution of the timer is 1 second and the range of the timer is from
1 sec to 255 sec. You need to send the time-out value to the I/O port –
443H, and then enable it by reading data from the same I/O port – 443H.
This will activate the timer that will eventually time out and reset the
CPU board. To ensure that this reset condition won’t occur, the Watch -
Dog Timer must be periodically refreshed by reading the same I/O port
443H. This must be done within the time-out period, please refer to the
example program. Finally, we have to disable the Watch-Dog timer by
reading the I/O port -- 843H or 043H. Otherwise the system could reset
unconditionally.
A tolerance of at least 5% must be maintained to avoid unknown
routines in the operating system (DOS), such as disk I/O that can be
very time-consuming. Therefore if the time-out period has been set to 10
seconds, the I/O port 443H must be read within 7 seconds.
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