ICP Electronics IEI PCISA-6755-RS Series Скачать руководство пользователя страница 25 | Manualshive

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3.15

LVDS LCD Connector

PCISA

-6755 can support 1 or 2 channel (18 or 36bit) LVDS

panel, which can be connected to CN1. The pin assignments
are as follows.

•

CN1 : LVDS LCD Connector

PIN DESCRIPTION PIN

DESCRIPTION

1 2

nd

LVDS clock

2

2nd LVDS clock output -

3 2

nd

LVDS data2

4

2nd LVDS data2 output -

5 2

nd

LVDS data1

6

2nd LVDS data1 output -

7 2

nd

LVDS data0

8

2nd LVDS data0 output -

9

1st LVDS clock

10

1st LVDS clock output -

11

1st LVDS data2

12

1st LVDS data2 output -

13

1st LVDS data1

14

1st LVDS data1 output -

15

1st LVDS data0

16

1st LVDS data0 output -

17 GROUND 18

GROUND

19 +LCD

(+3Vor +5V)

20

+LCD

(+3Vor +5V)

NOTE:Please refer to Appendix E for the signal mapping of LVDS

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Содержание IEI PCISA-6755-RS Series

Страница 1: ...PCISA 6755 RS Series P III Tualatin Celeron C3 Processor With Ethernet USB 2 0 Audio Embedded Board User Manual Jan 23 2007 Copyright 2006 by ICP Electronics Inc All Rights Reserved ...

Страница 2: ...ble for direct indirect special incidental or consequential damages arising out of the use or inability to use the product or documentation even if ad vised of the possibility of such damages This document contains proprietary information protected by copyright All rights are reserved No part of this manual may be reproduced by any mechanical electronic or other means in any form without prior wri...

Страница 3: ...CTION 15 3 1 AUDIO CONNECTORS 15 3 2 IDE DISK DRIVE CONNECTOR 16 3 3 PARALLEL PORT 17 3 4 LVDS LCD INVERTER CONNECTOR 18 3 5 USB PORT CONNECTORS 18 3 6 SERIAL PORTS 19 3 7 KEYBOARD MOUSE CONNECTOR 20 3 8 IRDA INFRARED INTERFACE PORT 21 3 9 FAN CONNECTOR 21 3 10 VGA CONNECTOR 22 3 11 DIGITAL I O CONNECTOR 22 3 12 EXTERNAL SWITCHES AND INDICATORS 23 3 13 PS ON CONNECTOR 23 3 14 LAN RJ45 CONNECTOR 24...

Страница 4: ...POWER MANAGEMENT SETUP 40 4 10 PCI PLUG AND PLAY SETUP 42 4 11 PERIPHERAL SETUP 44 4 12 HARDWARE MONITOR SETUP 46 4 13 CHANGE SUPERVISOR PASSWORD 46 APPENDIX A WATCHDOG TIMER 49 APPENDIX B SYSTEM RESOURCES 51 APPENDIX C HOW TO USE WAKE UP FUNCTION 52 APPENDIX D DIGITAL I O 53 APPENDIX E SIGNAL MAPPING OF LVDS 54 APPENDIX F ATX POWER SUPPLY 56 4 ...

Страница 5: ...ontroller can share 8 32MB frame buffer of system memory For the application that needs high speed serial transmission PCISA 6755 provides the USB2 0 for your choice The high speed USB2 0 host controller implements an ECHI interface that provides 480Mb s bandwidth Both on chip UARTs are compatible with the NS16C550 The parallel port and IDE interface are compatible with IBM PC AT architecture PCIS...

Страница 6: ... advantage so there is no need to do any changes for users current accessories Floppy disk drive interface Supports up to two floppy disk drives 5 25 360KB and 1 2MB and or 3 5 720KB 1 44MB and 2 88MB Serial ports Two RS 232 ports with 16C550 UART or compatible with 16 byte FIFO buffer Support up to 115 2Kbps Ports can be individually configured to COM1 COM2 or disabled Bi directional parallel por...

Страница 7: ...10BASE T 100BASE TX standard The RJ45 connectors are located on the mounting bracket for easy connection Keyboard and PS 2 mouse connector A 6 pin mini DIN connector is located on the mounting bracket for easy connection to a keyboard or PS 2 mouse For alternative application a keyboard pin header connector are also available on board Audio AC 97 Audio CODEC Compactflash It can be used with a pass...

Страница 8: ...io cable One USB cable One ATA IDE cable Keyboard and mouse Y Adapter cable Mini jumper Pack One Utility CD One QIG NOTES If any of these items are missing or damaged contact the dealer from whom you purchased this product Save the shipping materials and carton in case you want to ship or store the product in the future 8 ...

Страница 9: ... is shown on the next page and the Unpacking Precautions that you should be careful with is described on the following page Also included is the jumpers and switches setting for this board s configuration such as CPU type selection system clock setting and Watchdog timer 2 1 Layout Please refer to next page 9 ...

Страница 10: ...Layout PCISA 6755 Series 10 ...

Страница 11: ...2 2 Dimension Diagram Unit mm 11 ...

Страница 12: ...g any conducting materials that is connected to the ground Handle your PCISA 6755 SBC by its edges Don t touch IC chips leads or circuitry if not necessary Do not plug any connector or jumper while the power is on 2 4 Clear CMOS Setup To clear the CMOS Setup for example if you have forgotten the password you should clear the CMOS and then re set the password you have to close the J5 2 3 for about ...

Страница 13: ...ting J1 TFT LCD Power Setting J1 DESCRIPTION 1 2 3V TFT LCD 2 3 5V TFT LCD 2 7 COM2 RI Function Setting J6 RI Function Setting Short 2 4 pin normal RS232 RI Function Short 4 6 1 3 pin RI is 5V output Short 4 6 3 5 pin RI is 12V output J6 DESCRIPTION 2 4 Normal RI Function 1 3 4 6 RI is 5Voltage output 3 5 4 6 RI is 12Voltage output 13 ...

Страница 14: ...2 8 Compact Flash Master Slave Function Setting J3 Compact Flash Master Slave Function Setting Short 1 2 pin Compact Flash is Master J3 DESCRIPTION Close Master Open Slave 14 ...

Страница 15: ...d AC 97 CODEC supports several audio functions The audio connectors are described below CN6 Audio Headphone Jack Output Speak Jack Output LINE_IN1 Audio LINE IN Connector Input CD_IN1 Audio CD IN Connector Input MIC1 Audio MIC IN Connector Input DESCRIPTION PIN NO LINE_IN1 CD_IN1 MIC1 1 LEFT LEFT MIC IN 2 GND GND GND 3 GND GND GND 4 RIGHT RIGHT NC 15 ...

Страница 16: ...SCRIPTION PIN DESCRIPTION 1 RESET 2 GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA 11 11 DATA 3 12 DATA 12 13 DATA 2 14 DATA 13 15 DATA 1 16 DATA 14 17 DATA 0 18 DATA 15 19 GROUND 20 N C 21 DRQ 22 GROUND 23 IOW 24 GROUND 25 IOR 26 GROUND 27 CHRDY 28 REV PULL LOW 29 DACK 30 GROUND DEFAULT 31 INTERRUPT 32 N C 33 SA1 34 N C 35 SA0 36 SA2 37 HDC CS0 38 HDC CS1 39 HDD AC...

Страница 17: ... the connector is specified as following table PRN1 Parallel Port Connector PIN DESCRIPTION PIN DESCRIPTION 1 STROBE 2 DATA 0 3 DATA 1 4 DATA 2 5 DATA 3 6 DATA 4 7 DATA 5 8 DATA 6 9 DATA 7 10 ACKNOWLEDGE 11 BUSY 12 PAPER EMPTY 13 PRINTER SELECT 14 AUTO FORM FEED 15 ERROR 16 INITIALIZE 17 PRINTER SELECT LN 18 GROUND 19 GROUND 20 GROUND 21 GROUND 22 GROUND 23 GROUND 24 GROUND 25 GROUND 26 NC 17 ...

Страница 18: ...ND 5 ENVEE 3 5 USB Port Connectors PCISA 6755 is equipped with two USB 2 0 ports high bandwidth 480Mbps and is backward compatible with USB1 1 The detailed pin assignment of the connectors are specified as following tables USB1 USB 2 0 Connector 1st 2 nd port PIN DESCRIPTION PIN DESCRIPTION 1 VCC 8 GROUND 2 DATA0 7 DATA1 3 DATA0 6 DATA1 4 GROUND 5 VCC USB2 USB 2 0 Connector 3rd 4 th port PIN DESCR...

Страница 19: ...mpatible UARTs with Read Receive 16 byte FIFO serial ports The detailed pin assignment of the connectors are specified as following tables COM1 COM2 Serial Port Connector PIN DESCRIPTION PIN DESCRIPTION 1 DCD 6 DSR 2 RXD 7 RTS 3 TXD 8 CTS 4 DTR 9 RI 5 ROUND 10 NC 19 ...

Страница 20: ...onnector KB_MS1 and a 5 pin keyboard connector CN9 KB_MS1 Mini DIN Keyboard Mouse Connector PIN DESCRIPTION 1 KEYBOARD DATA 2 MOUSE DATA 3 GROUND 4 5V 5 KEYBOARD CLOCK 6 MOUSE CLOCK CN16 5 pin Keyboard Connector PIN DESCRIPTION 1 KEYBOARD CLOCK 2 KEYBOARD DATA 3 NC 4 GROUND 5 5V 20 ...

Страница 21: ...NC 3 IR RX 4 Ground 5 IR TX 3 9 Fan Connector PCISA 6755 also contains a CPU cooling fan connector which can supply 12V 500mA to the fan There is a rotation pin in the fan connector which transfers the fan s rotation signal to the system BIOS in order to recognize the fan speed Please note that only specific fans offer a rotation signal The detailed pin assignment of the connector are specified as...

Страница 22: ...D 9 NC 10 GROUND 11 NC 12 DDCDAT 13 HSYNC 14 VSYNC 15 DDCCLK 3 11 Digital I O Connector The digital I O port of PCISA 6755 is 3 3V level Internal pull up are existed on the output CN4 10 pin Digital I O Connector PIN DESCRIPTION PIN DESCRIPTION 1 GROUND 2 3 3V 3 INPUT1 4 OUTPUT1 5 INPUT2 6 OUTPUT2 7 INPUT3 8 OUTPUT3 9 INPUT4 10 OUTPUT4 22 ...

Страница 23: ...ified as following table CN5 Pin Assignment and Functions FUNCTION PIN DESCRIPTION 2 SPK SIGNAL 4 Buzzer Jump for Buzzer 6 NC SPEAKER 8 VCC 10 RESET RESET 12 GROUND 9 IDE_LED HDD LED 11 IDE_LED 1 LED POWER LED 3 LED GROUND 5 GROUND POWER BUTTON 7 PSON 3 13 PS ON Connector This connector is used to control the ATX power supply CN18 PS ON Connector refer to Appendix F for details PIN DESCRIPTION 1 5...

Страница 24: ...bps Fast Ethernet controllers which are connected to the LAN via an RJ45 connector The pin assignment of connectors is are as follow table J7 J8 PCISA 6755E2 RJ45 Connectors 10 100M PIN DESCRIPTION PIN DESCRIPTION 1 TX 5 N C 2 TX 6 RX 3 RX 7 N C 4 N C 8 N C 24 ...

Страница 25: ...2nd LVDS data2 output 4 2nd LVDS data2 output 5 2nd LVDS data1 output 6 2nd LVDS data1 output 7 2nd LVDS data0 output 8 2nd LVDS data0 output 9 1st LVDS clock output 10 1st LVDS clock output 11 1st LVDS data2 output 12 1st LVDS data2 output 13 1st LVDS data1 output 14 1st LVDS data1 output 15 1st LVDS data0 output 16 1st LVDS data0 output 17 GROUND 18 GROUND 19 LCD 3Vor 5V 20 LCD 3Vor 5V NOTE Plea...

Страница 26: ...DESCRIPTION PIN DESCRIPTION 1 GROUND 2 RWC0 3 GROUND 4 NC 5 GROUND 6 RWC1 7 GROUND 8 INDEX 9 GROUND 10 MO A 11 GROUND 12 DS B 13 GROUND 14 DS A 15 GROUND 16 MO B 17 GROUND 18 DIR 19 GROUND 20 STEP 21 GROUND 22 WD 23 GROUND 24 WGATE 25 GROUND 26 TRK0 27 GROUND 28 WP 29 GROUND 30 RDATA 31 GROUND 32 HEAD 33 GROUND 34 DSKCHG 26 ...

Страница 27: ...nment PIN DESCRIPTION PIN DESCRIPTION 1 GROUND 26 PULL DOWN 2 D3 27 D11 3 D4 28 D12 4 D5 29 D13 5 D6 30 D14 6 D7 31 D15 7 CS1 32 CS3 8 N C 33 N C 9 GROUND 34 IOR 10 N C 35 IOW 11 N C 36 5V 12 N C 37 IRQ15 13 VCC 38 VCC 14 N C 39 MASTER SLAVE 15 N C 40 N C 16 N C 41 RESET 17 N C 42 IORDY 18 A2 43 N C 19 A1 44 5V 20 A0 45 ACTIVE 21 D0 46 PDIAG 22 D1 47 D8 23 D2 48 D9 24 N C 49 D10 25 PULL DOWN 50 GR...

Страница 28: ...of the disks and then launch and turn control over to the operating system While the BIOS is in control the Setup program can be activated in one of two ways 1 By pressing Del immediately after switching the system on 2 By pressing the Del key when the following message appears briefly at the bottom of the screen during the post Press DEL to enter SETUP If the message disappears before you respond...

Страница 29: ...it and not save changes into CMOS Status Page Setup Menu and Option Page Setup Menu Exit current page and return to Main Menu PgUp key Increase the numeric value or make changes PgDn key Decrease the numeric value or make changes key Increase the numeric value or make changes key Decrease the numeric value or make changes F1 key General help only for Status Page Setup Menu and Option Page Setup Me...

Страница 30: ...ot the AMI BIOS supports an override to the CMOS settings which resets your system to its defaults The best advice is to only alter settings which you thoroughly understand To this end we strongly recommend that you avoid making any changes to the chipset defaults These defaults have been carefully chosen by both AMI and your systems manufacturer to provide the absolute maximum performance and rel...

Страница 31: ...ief description of each highlighted selection appears at the bottom of the screen The main menu includes the following main setup categories Recall that some systems may not include all entries Standard CMOS Setup Use this menu for basic system configuration Advanced CMOS Setup Use this menu to set the Advanced Features available on your system Advanced Chipset Setup Use this menu to change the va...

Страница 32: ...upervisor Password Use this menu to set User and Supervisor Passwords Auto Configuration with Optimal Settings Use this menu to load the BIOS default values that are factory settings for optimal performance system operations While AMI has designed the custom BIOS to maximize performance the factory has the right to change these defaults to meet their needs Auto Configuration with Fail Safe Setting...

Страница 33: ...n Standard CMOS Setup Menu are divided into 10 categories Each category includes no one or more than one setup items Use the arrow keys to highlight the item and then use the PgUp or PgDn keys to select the value you want in each item 33 ...

Страница 34: ...enter the sub menu of detailed options IDE Secondary Master Options are in its sub menu described in Table 3 Press Enter to enter the sub menu of detailed options Drive A Drive B None 360K 5 25 in 1 2M 5 25 in 720K 3 5 in 1 44M 3 5 in 2 88M 3 5 in Select the type of floppy disk drive installed in your system Halt On All Errors No Errors All but Keyboard All but Diskette All but Disk Key Select the...

Страница 35: ...ption sets the type of device for the first boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes The settings are Disabled IDE 0 IDE 1 IDE 2 IDE 3 Floppy ARMD FDD ARMD HDD CDROM SCSI Try Other Boot Devices Set this option to Yes to instruct AMIBIOS to attempt to boot from any other drive in the system if it cannot find a boot drive among the drives specified in the 1st B...

Страница 36: ...tion turns off Num Lock when the system is powered on so the end user can use the arrow keys on both the numeric keypad and the keyboard Floppy Drive Swap Set this option to Enabled to permit drives A and B to be swapped The settings are Enabled or Disabled Floppy Drive Seek Set this option to Enabled to specify that floppy drives A will perform a Seek operation at system boot The settings are Ena...

Страница 37: ...ror If this option is enabled AMIBIOS waits for the end user to press F1 before continuing If this option is disabled AMIBIOS continues the boot process without waiting for F1 to be pressed The settings are Disabled or Enabled Hit DEL Message Display Disabling this option prevents Hit DEL if you want to run Setup from appearing when the system boots The settings are Disabled or Enabled Internal Ca...

Страница 38: ... the ROM area named in the option title The settings are Enable Disable Cached The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards 800 16k Shadow D000 16k Shadow These options enable shadowing of the contents of the ROM area named in the option title The settings are Enable Disable Cached The ROM area that is not used by ISA adapter cards will be allocated to ...

Страница 39: ...h as DRAM and the external cache It also coordinates communications between the conventional ISA bus and the PCI bus It must be stated that these items should never need to be altered The default settings have been chosen because they provide the best operating conditions for your system DRAM Frequency This setting decided by Memory frequency SDRAM CAS Latency This setting decided by Memory CAS la...

Страница 40: ...ware O S This feature is switch of ACPI function Configuration options No Yes ACPI Standby State This feature is switch of STR S3 or POS S1 function Configuration options S3 STR S1 POS Power Management APM When Disabled SMI will not be initialized and complete power management functionality is removed until this option is set to Enabled Video Power Down Mode Video power down when system in Suspend...

Страница 41: ... As Individual IRQ Wake Up Events Power Button Function On Off allows the system to switch off immediately the power button is pressed Suspend allows the system to Suspend immediately the power button is pressed Resume on Ring LAN Allow the system to wake up in respnse to a Ring Indicator signal from external modem Wake up on LAN gives you the ability to remotely boot a PC from across a network ev...

Страница 42: ...s which has boot flag set And PnP aware OS will configure all other devices If disable BIOS will configure all devices Clear NVRAM When this option is set to Yes system can auto clear NVRAM The settings are No Yes On Chip VGA Frame Buffer Size This option is select frame buffer size 2 32MB for VGA PCI Latency Timer PCI Clocks 42 ...

Страница 43: ...settings are Auto IRQ 3 4 5 7 9 10 and 11 in priority order DMA Channel 0 1 3 5 6 7 The option allow you to specify the bus type used by each DMA channel The settings are PnP or ISA EISA IRQ3 4 5 7 9 10 11 14 15 The option specify the bus that the specified IRQ line is used on The option allow you to reserve IRQs for legacy ISA adapter cards The option determine if AMIBIOS should remove an IRQ fro...

Страница 44: ...e settings are Auto AMIBIOS automatically determines the correct base I O port address Disabled 3F8h 2F8h 2E8h or 3E8h Serial Port4 Mode This option specifies the IR active pulse or inverting clock of serial port B IR Pin Select The SIN SOUT pin of Serial Port 3 function or IRRX IRTX pin if IR function in normal condition On Board Parallel Port This option specifies the base I O port address of pa...

Страница 45: ...here to the Entended Capabilities Port ECP specification ECP uses the DMA protocol to achieve data transfer rates up to 2 5 Megabits persecond ECP providessymmetric bidirectional communication EPP Version EPP data or address read cycle 1 9 or 1 7 Parallel Port DMA Channel This option is only available if the setting for the Parallel Port Mode option is ECP This option sets the DMA channel used by ...

Страница 46: ...e Monitor Setup 4 13 Change Supervisor Password You can set either supervisor or user password or both of them The differences between are Supervisor Password can enter and change the options of the setup menus 46 ...

Страница 47: ...re prompted to enter the password A message will confirm the password will be disabled Once the password is disabled the system will boot and you can enter Setup freely When a password has been enabled you will be prompted to enter it every time you try to enter Setup This prevents an unauthorized person from changing any part of your system configuration Additionally when a password is enabled yo...

Страница 48: ...iscusses the Setup program built into the BIOS which allows users to configure the system This configuration is then stored in battery backed CMOS RAM so that Setup information is retained whilst the power is off 48 ...

Страница 49: ...of the timer is from 1 sec to 255 sec You need to send the time out value to the I O port 443H and then enable it by reading data from the same I O port 443H This will activate the timer that will eventually time out and reset the CPU board To ensure that this reset condition won t occur the Watchdog Timer must be periodically refreshed by reading the same I O port 443H This must be done within th...

Страница 50: ...NITIAL TIMER COUNTER MOV DX TIMER_PORT MOV AL 8 8 seconds OUT DX AL MOV DX TIMER_START IN AL DX START COUNTER W_LOOP MOV DX TIMER_STOP IN AL DX MOV DX TIMER_START IN AL DX RESTART COUNTER ADD YOUR APPLICATION HERE CMP EXIT_AP 0 JNE W_LOOP MOV DX TIMER_STOP IN AL DX EXIT AP 50 ...

Страница 51: ...Chart IRQ0 System Timer IRQ8 RTC CMOS clock IRQ1 Keyboard IRQ9 ACPI STEERING IRQ2 IRQ Controller IRQ10 USB LAN Audio IRQ3 COM2 IRQ11 USB VGA IRQ4 COM1 IRQ12 PS 2 mouse IRQ5 USB LAN IRQ13 FPU IRQ6 FDC IRQ14 Primary IDE IRQ7 Printer IRQ15 Secondary IDE DMA Channel Assignment Channel Function 0 Available 1 Available 2 Floppy disk 3 Available 4 Cascade for DMA controller 1 5 Available 6 Available 7 Av...

Страница 52: ...e switched on when there is a ring signal detected on pin RI of serial port Wake Up On LAN When your computer is in power down status you can see LAN Link Active LED is flashing This status indicates that the LAN chip has entered standby mode and waits for Wake Up signal You can use other computers to wake up yours by sending ID to it ID ID is the MAC address of your system LAN Every LAN chip has ...

Страница 53: ...hat need On Off circuit or TTL devices When one of the signals has been selected The user can read or write data to the system through the Digital I O function A BIOS function call INT 15H is used to control the Watchdog Timer INT 15H AH 6FH Sub function AL 8 Set the Digital port as INPUT AL Digital I O input value Example program MOV AX 6F08H setting the Digital port is input INT 15H AL low byte ...

Страница 54: ...it LVDS mapping table R0 B2 R1 B3 R2 B4 R3 B5 R4 HSYNC R5 VSYNC G0 1st LVDS data0 output data0 output DE 1st LVDS data2 output data2 output G1 G2 G3 G4 G5 B0 B1 1st LVDS data1 output data1 output DCLK 1st LVDS clock output clock output 54 ...

Страница 55: ...ata2 output GA1 GA2 GA3 GA4 GA5 BA0 BA1 1st LVDS data1 output data1 output DCLKA 1st LVDS clock output clock output RB0 BB2 RB1 BB3 RB2 BB4 RB3 BB5 RB4 NC RB5 NC GB0 2nd LVDS data0 output data0 output NC 2nd LVDS data2 output data2 output GB1 GB2 GB3 GB4 GB5 BB0 BB1 2nd LVDS data1 output data1 output DCLKB 2nd LVDS clock output clock output 55 ...

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