
The digital audio or low speed data signals are output from
pin 9 of the demodulator IC (IC191) and are amplified at
IC343 (pins 6, 7).
The amplified signals are applied to the LOGIC-R unit via
J1801 (pin 20).
4-1-5 DIGITAL CIRCUITS (LOGIC-R UNIT)
The digital circuits convert the demodulated digital audio
or low speed data signals format for communication to
ID-RP2C.
The demodulated digital audio or low speed data signals
from the amplifier (MAIN-R unit: IC343, pin 7) are applied to
the GMSK MODEM (IC150, pin 11) via J400 (pin 20). The
applied signals are synchronized with the clock signal, then
the synchronized signals are applied to the CPU (IC50) via
the FPGA IC (IC200).
The output signals from the CPU (IC50) are amplifi ed at the
buffer amplifier (IC901) and then applied to the REAR unit
via J901.
The amplifi ed signals are applied to the connected repeater
controller (ID-RP2C) via [CONT I/O] (REAR unit; J2).
4-2 TRANSMITTER CIRCUITS
4-2-1 DIGITAL CIRCUIT (LOGIC-T UNIT)
The digital circuits convert the digital audio or low speed
data signals for transmit.
The digital audio or low speed data signals from the con-
nected repeater controller (ID-RP2C) are amplified at the
buffer amplifi er (IC901) and then applied to the CPU (IC50)
via [CONT I/O] (REAR unit; J2).
The applied digital audio or low speed data signals to the
CPU (IC50) are processed and then applied to the FPGA IC
(IC200) to split to the I and Q baseband signals for quadra-
ture modulation. The I/Q baseband signals output from
pins 75–80, 82–86 (IC200; for I signals), and 87–89, 92–99
(IC200; for Q signals) and then applied to the D/A converters
(R250–R271 for I signals, R272–R293 for Q signals).
The converted I/Q baseband signals are passed through
the baseband fi lters (IC300, IC302; for I signal), and (IC301,
IC302; for Q signal) and then applied to the MAIN-T unit via
J400 (pin 1 for I signal, pin 3 for Q signal).
4-2-3 MODULATION CIRCUIT (MAIN-T UNIT)
The modulation circuit modulates the 2nd LO signal at the
quadrature modulation circuit (IC890) using the I/Q base-
band signals from the LOGIC-T unit.
The I/Q baseband signals from the LOGIC-T unit are ampli-
fied at the I/Q baseband amplifiers (IC832, pins 1, 2 for I
signal, pins 6, 7 for Q signal) via J400 (pin 1 for I signal, pin
3 for Q signal) and then applied to amplifier section of the
quadrature modulator (IC890, pin 4 for I signal, pin 7 for Q
signal). The 2nd LO signal is also applied to the
±
45° phase
splitter section of the quadrature modulator (IC890, pin 8)
and then phase shifted and split 2nd LO signals are ampli-
fied at the LO amplifier sections. The amplified LO signals
are modulated with the I/Q baseband signals at I/Q modula-
tor sections and then combined at the combining amplifier
section. The modulated signal is output from pin 14 (IC890)
after amplified at the RF amplifier section.
The modulated signal is passed through the bandpass
(FI880) and low-pass (L892, L893, C904–C907) fi lters and
then applied to the 1st mixer circuit.
E - 4 - 2
From
demodulator
circuit
(MAIN-T; IC271)
RECEIVED SIGNAL
TRANSMIT SIGNAL
IC901
IC50
IC200
IC150
ID-RP2C
ID-RP2V
REAR
unit
LOGIC-R unit
BUFFER
AMP
CPU
GMSK
MODEM
FPGA
To modulator
circuit
(MAIN-R; IC831)
BASEBAND
FILTER
IC901
IC50
IC200
LOGIC-T unit
BUFFER
AMP
CPU
FPGA
• DIGITAL CIRCUITS