Icom FP-561, Руководство по обслуживанию

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3-3-4 SWITCHING CIRCUIT
IC9 (pins 9 and 10) controls the switch circuit (Q14, Q16),
and the primary winding of transformer (T2) is alternately
connected to and disconnected from the DC power.
3-3-5 RECTIFIER CIRCUIT
The secondary winding of T2 ( pin 6, pin 10 and pin 9) output
40 V, 12 V and 8 V (6 V) respectively. 40 V is rectified by D12,
C52 and is applied to the transmitter circuits. 12 V is rectified
by D13, C53 and is passed through the line filter (L5, C54),
and then applied to DISP unit and etc. 8 V is rectified by D22,
C69 and is applied to the 3-termianal 5 V regulator (IC13)
and 6 V regulator (Q27, D37).
3-3-6 OUTPUT VOLTAGE CONTROL CIRCUIT
8 V output is divided by R64, R65 and is applied to the com-
parator (IC11, pin 3). The applied voltage is compared with
other input (IC11, pin 2). When output voltage of IC11
increases due to increase of the 8 V, a base-current of the
photo-coupler (IC10) increases and a corrector–emitter’s
voltage decreases. At this time, IC9 (pin 2) reduces output
voltage and the width of output pulses from pin 9 and pin 10
becomes narrow. And also the interval which Q14 is ON, will
be short. Thus the working time of primary winding of trans-
former (T2) is short, and the outputs of secondary winding of
T2 decrease. This feedback circuit controls the constant out-
put voltages even if resistance or input voltage is changed.
3-3-7 LOW VOLTAGE PROTECTION CIRCUIT
Input voltage is divided between R67, R68. The divided volt-
age is applied to IC9 (pin 15). When the voltage is lower than
9 V, IC9 is turned OFF.
3-4 INTERFACE CIRCUITS
3-4-1 SHIP SPEED INTERFACE CIRCUIT
Ship speed interface circuit consists of IC7, D27. Ship speed
sensor generates palse signals according to the rotation of
mill wheel in the water. The pulse signals from the ship speed
sensor via the J2 (pin 1) are shaped wave form at the Schmitt
circuit (IC7a) and applied to the LOGIC unit via J1 (pin 7).
3-4-2 WATER TEMPERATURE INTERFACE CIRCUIT
The resistance from the external thermistor accoding to the
water tempereture is input to MAIN unit via J2 (pin 7), and is
then applied to the LOGIC unit via J1 (pin 8).
3-4-3 NMEA INTERFACE CIRCUIT
• NMEA INPUT CIRCUIT
NMEA input circuit consists of IC7, IC8. The NMEA signals
from external connector (J4, pins 1, 2) are shaped wave form
at the Schmitt circuit (IC7b) via the photo-coupler (IC8), and
are then applied to the LOGIC unit via J1 (pin 9).
• NMEA OUTPUT CIRCUIT
NMEA output circuit consists of IC17, Q28–Q31. The NMEA
signals from the LOGIC unit are input to the MAIN unit via J1
(pin 10). The signals are buffer-amplified and level-shifted at
NMEA output circuit, and are then applied to the external
connector (J4, pins 3, 4).
3-4-3 DGPS INTERFACE CIRCUIT
• DGPS INPUT CIRCUIT
DGPS input circuit consists of IC7, IC15. The DGPS signals
from external connector (J5, pins 4, 5) are passed through
the photo-coupler (IC15) and shaped wave form at the
Schmitt circuit (IC7c), and are then applied to the LOGIC unit
via J1 (pin 11).
• DGPS OUTPUT CIRCUIT
DGPS output circuit consists of IC17, Q32–Q35. The DGPS
signals from the LOGIC unit are input to MAIN unit via J1 (pin
12). The signals are buffer-amplified and level-shifted at
DGPS output circuit, and are then applied to the external
connector (J5, pins 2, 3).
3-5 LOGIC CIRCUITS
3-5-1 CPU AND THE PERIPHERAL CIRCUITS
(LOGIC UNIT)
The LOGIC unit consists of ROM, RAM and 2 kind of CPU
which are 32 bit ARM RISC micro-controller and 8 bit micro-
controller. CPUs and a control circuit control all functions.
The interrupt signal functions in the following way:
• MAIN CPU (IC1)
The main CPU (IC1) is a 32 bit RISC CPU and acts as a
computer circuit to control all functions and to respond to all
kind of interruptions. The main CPU uses a 32 MHz clock sig-
nal from X1.
The main CPU (IC1) generates an address signal and an
RGB signal corresponding to display coordinates and the
address of DRAM. This IC chip also generates vertical sig-
nals and synchronicity signals for the LCD
• SUB CPU (IC22)
The sub CPU controls the LCD brightness, ship speed, key-
board, sounder and serial communication from the GPS,
DGPS, NMEA. The sub CPU uses a RESET signal and 16
MHz clock signal from main CPU (IC1).
• RAM (IC20, IC21)
IC20 is a 4k
×
9 bit FIFO RAM which buffer strage for sending
received sounder signal from the sub CPU (IC22) to main
CPU (IC1).
IC21 is a 256
×
8 bit mail-box RAM which communicates GPS
data or keyboard data between the main CPU (IC1) and sub
CPU (IC22).
• ROM (IC32, IC33)
IC32 and IC33 are 8 Mbit flash ROMs. ROM contains a sys-
tem operating program and data of world map.
• ADDRESS DECODER (IC28)
IC28 is a PLD (programmable logic device) which is address
decoder and controller of the card-data reader, and outputs
chip select signal to IC1 and I/O peripheral signals.
• SRAM (IC30, IC31)
IC30 and IC31 are 1 Mbit SRAMs which backuped by the
memory battery (BT1).
• DRAM (IC34, IC35)
IC34, IC35 are DRAMs and are used for video RAMs. Each
chip has a capacity of 4 Mbits.