HUAWEI MU509-65 HSDPA LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 01 (2016-04-08)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
40
Figure 3-22
Circuit diagram of the interface of the second audio channel
SPKR_OUT_P
SPKR_OUT_N
MIC2_P
MIC2_N
E
S
D
p
ro
te
ct
io
n
33 pF
ferrite bead
ferrite bead
ferrite bead
ferrite bead
MIC
Speaker
33 pF
33 pF
33 pF
100 pF
100 pF
E
S
D
p
ro
te
c
ti
o
n
+
+
-
-
Module
(DCE)
It is recommended that a TVS be used on the related interface, to prevent electrostatic
discharge and protect integrated circuit (IC) components.
3.8.2 Digital Audio
The MU509-65 provides one digital audio channels. Table 3-12 lists the signals on the
digital audio interface.
Table 3-12
Signals on the digital audio interface
Pin No. Pin Name
Pad
Type
Description
Parameter
Min.
(V)
Typ.
(V)
Max.
(V)
5
PCM_SYNC
O
PCM interface sync
V
OH
2.15
-
2.6
V
OL
0
-
0.45
6
PCM_DIN
I
PCM I/F data in
V
IH
1.69
-
2.9
V
IL
–0.3
-
0.91
7
PCM_DOUT
O
PCM I/F data out
V
OH
2.15
-
2.6
V
OL
0
-
0.45
8
PCM_CLK
O
PCM interface clock
V
OH
2.15
-
2.6
V
OL
0
-
0.45
The MU509-65 PCM interface enables communication with an external codec to
support linear and
μ-law format. The PCM_SYNC runs at 8 kHz with a 50% duty
cycle.