Table 3-23
DIP switch SW1 on the UTRP
DIP
Switch
DIP Status
Description
1
2
3
4
SW1
OFF
OFF
OFF
OFF
Balanced
Mode
ON
ON
ON
ON
Unbalanced
Mode
Other settings of the DIP bits
Disabled
Table 3-24
DIP switch SW2 on the UTRP
DIP
Switch
DIP Status
Description
1
2
3
4
SW2
OFF
OFF
OFF
OFF
Balanced
Mode
ON
ON
ON
ON
Unbalanced
Mode
Other settings of the DIP bits
Disabled
CAUTION
SW1 and SW2 are set to OFF (balanced mode) by default. When the eight E1s are faulty, all the
DIP bits of SW1 and SW2 should be set to ON to rectify faults. SW1 corresponds to E1s No.4
to No.7 and SW2 corresponds to E1s No.0 to No.3.
Table 3-25
DIP switch SW3 on the UTRP
DIP
Switch
DIP Status
Description
1
2
3
4
SW3
OFF
OFF
ON
ON
T1 Mode
ON
ON
OFF
OFF
The E1
impedance is
set to 120
ohms.
3 BBU3900 Equipment
BBU3900
Hardware Description
3-22
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
Issue 11 (2010-11-10)
Содержание BBU3900
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