HPE Edgeline EL20, Руководство по техническому обслуживанию и ремонту, Страница: 42 / 52

PCH-IO Configuration
• PCI Express Configuration —Displays PCIE1~PCIE8 root port detail configuration settings:
◦ PCI Express Clock Gating —Enables or disables PCI Express Clock Gating for each root port
◦ DMI Link ASPM Control —Enables or disables the DMI Link ASPM Control
◦ DMI Link Extended Synch Control —Enables user to configure the Mini PCI Express setting
◦ PCIe-USB Glitch W/A —Enables or disables PCIe-USB Glitch workaround for bad USB devices
connected behind the PCIE/PEG Port.
◦ PCI Root Port Function Swapping —Enables or disables PCI Express root port function swapping
◦ Subtractive Decode —Enables or disables subtractive decode
◦ PCI Express Root Port 1/2/3/6 —Enables user to configure PCI express root port 1/2/3/6 setting
• USB Configuration —Displays configuration of USB functions:
◦ USB Precondition —Enables or disables USB precondition. Precondition work on the USB host
controller and root ports for faster enumeration.
◦ XHCI Mode —Enables user to select the mode of operation of XHCI mode
◦ XHCI Idle L1 —Enables or disables XHCI Idle L1. The XHCIIDLE L1 can be set to disabled for LPT-
LP Ax stepping to work around USB 3. 0 hot plug failure after 1 hot-plug removal.
◦ BTCG —Enables or disables trunk clock gating
◦ USB Ports Per-Port Disable Control —Enables or disables USB ports per-port disable control
• PCH Azalia Configuration —Displays configuration of azalia functions
• LAN 1/2 controller —Enables or disables the LAN 1/2 controller:
◦ LAN 1/2 PXE Rom —Enables or disables PXE Rom for LAN 1/2
◦ Wake on LAN —Enables or disables LAN1 wake up from sleep state
42 PCH-IO Configuration