HP Integrity rx8640, Руководство пользователя

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The memory subsystem comprises four independent quadrants. Each quadrant has its own
memory data bus connected from the cell controller to the two buffers for the memory quadrant.
Each quadrant also has two memory control buses: one for each buffer.
Figure 1-8 Memory Subsystem
PDH Riser
Board
DIMM
Buffer
Address/
Controller
Buffer
Buffer
DIMM
DIMM
DIMM
Q
U
A
D
3
Cell
Controller
DIMM
DIMM
Buffer Buffer
DIMM
DIMM
Q
U
A
D
2
To
Q
ua
d
2
A
dd
re
ss
/C
on
tr
ol
le
r B
uf
fe
rs
To
Q
ua
d
3
A
dd
re
ss
/C
on
tr
ol
le
r B
uf
fe
rs
CPU 3
Front Side Bus 1
CPU 2
Front Side Bus 0
CPU 1 CPU 0
Buffer
DIMM
DIMM
DIMM
DIMM
Buffer
Q
U
A
D
0
To
Q
ua
d
0
A
dd
re
ss
/C
on
tr
ol
le
r B
uf
fe
rs
To
Q
ua
d
1
A
dd
re
ss
/C
on
tr
ol
le
r B
uf
fe
rs
Buffer
DIMM
Buffer
Address/
Controller
DIMM
DIMM
Buffer
Q
U
A
D
1
DIMM
Address/
Buffer
Controller
Address/
Controller
Buffer
DIMMs
The memory DIMMs used by the server are custom designed by HP. Each DIMM contains DDR-II
SDRAM memory that operates at 533 MT/s. Industry standard modules do not support the high
availability and shared memory features of the server. Therefore, industry standard DIMM
modules are not supported.
The server supports DIMMs with densities of 1, 2, 4, and 8 GB. Table 1-2 lists each supported
DIMM size, the resulting total server capacity, and the memory component density. Each DIMM
is connected to two buffer chips on the cell board.
Table 1-2 DIMM Sizes Supported
Memory Component Density Total Capacity DIMM Size
256 Mb 64 GB 1 GB
512 Mb 128 GB 2 GB
1024 Mb 256 GB 4 GB
2048 Mb 512 GB 8 GB
20 HP Integrity rx8640 and HP 9000 rp8440 Server Overview