HP Integrity rx8640, Руководство пользователя

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Central Processor Units
The cell board can hold up to four CPU modules. Each CPU module can contain up to two CPU
cores on a single die. Modules are populated in increments of one. On a cell board, the processor
modules must be the same family, type, and clock frequencies. Mixing of different processors
on a cell or a partition is not supported. See
Table 1-1 for the load order that must be maintained
when adding processor modules to the cell board. See Figure 1-7 for the locations on the cell
board for installing processor modules.
NOTE: Unlike previous HP cell based systems, the server cell board does not require that a
termination module be installed at the end of an unused FSB. System firmware is allowed to
disable an unused FSB in the CC. This enables both sockets of the unused bus to remain
unpopulated.
Table 1-1 Cell Board CPU Module Load Order
Socket 0 Socket 1 Socket 3 Socket 2 Number of
CPU Modules
Installed
CPU installed Empty slot Empty slot Empty slot 1
CPU installed Empty slot Empty slot CPU installed 2
CPU installed CPU installed Empty slot CPU installed 3
CPU installed CPU installed CPU installed CPU installed 4
Figure 1-7 Socket Locations on Cell Board
Socket 2 Socket 3 Socket 1 Socket 0
Cell
Controller
Memory Subsystem
Figure 1-8 shows a simplified view of the memory subsystem. It consists of four independent
access paths, each path having its own address bus, control bus, data bus, and DIMMs . Address
and control signals are fanned out through register ports to the synchronous dynamic random
access memory (SDRAM) on the DIMMs.
Detailed Server Description 19