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3.1.4
Tracing
When a debug log has been established, tracing may be configured by specifying one or more of the reporting level
options:
Option
Reporting Level
INSTR
Machine instructions executed
DATA
Memory data accesses
FETCH
Memory instruction fetches
REG
Register values
OPND
Memory operand values
EXEC
Matching instruction execution states
A section of an example trace is:
>>CPU instr: S 0002 05756 102705 STC 5
>>CPU fetch: S 0002 05757 105736 instruction fetch
>>CPU reg: P **** 01011 042200 A 177777, B 177777, X 177777, Y 000000, E O I
>>CPU instr: S 0002 05757 105736 UJP 2111
>>CPU fetch: S 0002 05760 002111 instruction fetch
>>CPU fetch: U 0001 02111 026111 instruction fetch
>>CPU reg: P **** 01011 042200 A 177777, B 177777, X 177777, Y 000000, E O I
>>CPU instr: U 0001 02111 026111 JMP 2111
>>CPU instr: U 0001 02111 000011 interrupt
>>CPU fetch: S 0000 00011 115013 instruction fetch
>>CPU reg: - **** 01011 042200 A 177777, B 177777, X 177777, Y 000000, E O I
>>CPU reg: - **** ***** ****** MPF 000000, MPV 002111, MES 163011, MEV 030000
>>CPU instr: S 0000 00011 115013 JSB 1013,I
>>CPU data: S 0000 01013 005557 data read
>>CPU data: S 0002 05557 002111 data write
>>CPU fetch: S 0002 05560 103100 instruction fetch
>>CPU reg: - **** 01011 042200 A 177777, B 177777, X 177777, Y 000000, E O I
The
INSTR
option traces instruction executions. Each instruction is printed before it is executed.
The
DATA
option traces reads from and writes to memory. Each is classified by the type of access — data or
unprotected. Normal data accesses are translated by the current map if DMS is enabled and are subject to
memory and DMS page protections. Unprotected accesses are translated by the specified map if DMS is enabled
and have unrestricted access to memory. Certain firmware extension instructions make unprotected accesses
through the system or user maps.
The
FETCH
option traces instruction fetches from memory. Interrupt trap cell instructions and the additional words
of multiword instructions are included in this classification.
The
REG
option traces register values. Two sets of registers may be printed. After executing each instruction, the
accumulators, index registers, extend and overflow registers, and the state of the interrupt system are printed.
After executing an instruction that may alter the memory-protect or memory-expansion registers, the fence,
violation, and status registers are printed.
The
OPND
option traces instruction operand values. Some instructions take memory and register operands that
are difficult to decode from
DATA
or
REG
traces. This option presents these operands in a higher-level format.
The memory bank and address values are always those of the operands. The operand data and values printed are
specific to the instruction.
