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2 System Board - (SiS Chipset) (Part Number: D4051-63001)
Devices on the PCI Bus
Devices on the PCI Bus
Graphics/Integrated Video (D4051-63001)
The HP Vectra 500 Series PC uses the SiS 6205 video controller and
supports video resolutions up to 1280 x 1024.
Video Controller
As explained earlier, the SiS 6205 video controller supports the UMA
architecture, and therefore no dedicated video memory is loaded on the
system board. The shared frame buffer is located in the system DRAM, and
the video controller accesses it through the M A (MA) and M D (MD) bus.
The SiS 6205 video controller arbitrates for the use of the system memory
with the memory controller included in the SiS 5511 Host Bridge and
Memory Controller. Whenever the video controller wants to access the
memory bus, it makes a request to the SiS 5511 controller. This then grants
the memory bus to the SiS 6205 video controller unless it is needed by the
chipset. The arbitration scheme takes place through three signals:
VGAREQ#, VGAGNT#, and PREQ (if the high/low priority scheme is
enabled).
The SIS 6205 video controller offers full compatibility with VGA. In addition,
the features are enhanced beyond Super VGA by hardware which
accelerates graphical user interface operation in Windows 95.
The enhanced features include:
•
Direct connectivity to PCI bus.
•
True acceleration for 8, 16 and 32-bit pixel depths.
•
57 MHz clock for video memory.
•
Fully programmable Pixel Clock Generator up to 135 MHz.
•
Fast linear addressing with full software relocation.
For details about supported video resolutions, refer to “Video Controllers”
on page 115 for a table containing all the video resolutions supported.
