background image

5

5

4

4

3

3

2

2

1

1

E

E

D

D

C

C

B

B

A

A

Power Supplies: 1V, 1.8V, 3.3V

green

PCIe Interface

8-10 layers: Each pair 85 ohms +/- 15% differential impedance.
Microstrip design on top layer using Saturn PCB tool.

3V3 Power Sequence Switch

Note 1

Note 1:
Distribute power over planes to where they need to go under the 
FPGA as much as possible.

Where possible parts were selected
for bottom height requirement < 1.35mm 
to allow back side placement.

Note 1

Note 1

Note 1

Power Supplies: GBT 1V, 1.2V

RE: L1 and L2:
Prefer using original inductor PN's.
But if size is limiting, use this alternate

PN: Digi 587-3231-1-ND. L1 is more
important  to use original.

3V3aux

3V3aux

3V3aux

SW1

VFB1

3V3aux

3V3aux

+1V5

+1V5

+1V5

VFB3

SW3

sys_rst_n

VCCO3V3

VCCAUX_1V8

VCCINT_1V

MGTAVTT1V2

3V3aux

MGTAVCC1V

MGTAVTT1V2

VCCINT_1V

VCCAUX_1V8

VCCO3V3

MGTAVCC1V

MGTAVTT1V2

3V3aux

MGTAVTT1V2

MGTAVCC1V

VCCO3V3

VCCAUX_1V8

VCCINT_1V

GND

Title

Size

Document Number

R e v

Date:

Sheet

o f

<Doc>

A

Holt PCIe-Mini dual MIL-STD 1553

B

1

5

Thursday, January 16, 2020

Title

Size

Document Number

R e v

Date:

Sheet

o f

<Doc>

A

Holt PCIe-Mini dual MIL-STD 1553

B

1

5

Thursday, January 16, 2020

Title

Size

Document Number

R e v

Date:

Sheet

o f

<Doc>

A

Holt PCIe-Mini dual MIL-STD 1553

B

1

5

Thursday, January 16, 2020

C71

0.22uF

C16

1uF

C9

10pF

C1
10uF

REFCLK-

PERn0
PERp0

PETn0
PETp0

J1

PCIe Edge Gold Fingers 26x2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

R10
470

C7

10uF

R5

255K

C4

.1uf

R4
511K

FB1

C5
10pF

C19

1uF

C70

0.22uF

FB2

C18

1uF

C2
10uF

R3

340K

L2

1.5uH

D1

PWR

C6

0.01uF

R1

511K

R2
226K

C20

2.2uF 6.3V

XC7A12T-2CPG238

U2E

MGTRREF_216

C7

MGTREFCLK0N_216

A8

MGTREFCLK0P_216

B8

MGTREFCLK1P_216

B10

MGTREFCLK1N_216

A10

MGTPTXP1_216

B2

MGTPTXN1_216

A2

MGTPRXP1_216

B6

MGTPRXN1_216

A6

MGTPTXP0_216

D2

MGTPTXN0_216

D1

MGTPRXP0_216

B4

MGTPRXN0_216

A4

R8
330

L1

1.5uH

Q2

MMBT3904TT1G SC-75

1

2

3

U3

LD39015 SOT23-5L

IN

1

GN

D

2

EN

3

NC

4

OUT

5

C15

1uF

C11

0.22uF

FB4

FERRITE BEAD

C12

0.22uF

R6

15

Q1 SI2347DS

3

1

2

C13
10uF

C8

2.2uF 6.3V

R9
3.3K

R11
10K

R7

100 1/10W 1%

U4

LD39015 SOT23-5L

IN

1

GN

D

2

EN

3

NC

4

OUT

5

3X3 QFN

LTC3545EUD#PBF

U1

RUN1

14

RUN2

3

RUN3

10

PGOOD1

2

PGOOD2

4

PGND

6

PVIN

7

SW1

1

VFB1

13

SW2

5

VFB2

12

SW3

8

VFB3

11

GN

D

17

SYNCMO

D

E

9

G

NDA

16

VIN

15

C14

.1uf

C3
2.2uF 6.3V

C10

0.01uF

C17
2.2uF 6.3V

FB3

FERRITE BEAD

Содержание ADK-2130mPCIe

Страница 1: ...AN 2130mPCIe_New 01 20 ADK 2130mPCIe Technical Manual Jan 16 2020...

Страница 2: ...This page intentionally blank...

Страница 3: ...Holt Integrated Circuits 3 REVISION HISTORY Revision Date Description of Change AN 2130mPCIe Rev New 1 16 20 Initial Release...

Страница 4: ...on to the card Application Development Kit ADK contents and how to run the demonstration software using the Holt bootable Flash Drive Use the instructions in this guide to install the Holt software an...

Страница 5: ...TC3545 1 spare 3 3VMOSFET switch 100MHz MEMS OSC Quad SPI FLASH JTAG 8 pin to FPGA 3 3aux VCCINT 1V MGTAVCC1V VCC1 8V JTAG VCCO 3V3 52 pin PCIe conn Xilinx ARTIX 7 XC7A127 2CPG238I 10 x 10 HI 2130 36...

Страница 6: ...h which present a low to the HI 2130 devices which enables 1553 bus transmissions by default Table 8 is a list of the signals and descriptions on the inter connect ribbon J4 connector For board compon...

Страница 7: ...has not tried any other Linux version as of this date Windows support is planned in the future https ubuntu com download 5 Power up the PC Shortly after powering up the computer the green PCIe Link L...

Страница 8: ...s complete optionally launch eclipse to see it working then exit the program It s possible to create a program short cut from a terminal window where eclipse is installed then drag the link to the des...

Страница 9: ...clipse Project Explorer PE window isn t shown type in Project Explorer into the Quick Access window located on the top right corner of the screen and select it from the list of items shown The three p...

Страница 10: ...ble kernel module pcie_lkm ko This module must be loaded into the Linux OS before executing the Demo project or an error will be produced This module provides support for writing and reading HI 2130 d...

Страница 11: ...t is modified and rebuilt the exiting kernel module must be unloaded before the new one is reloaded sudo sh unload_pcie_load sudo sh load_pcie_load These script commands were embedded in the run scrip...

Страница 12: ...rs asking to select either C C Controller Application or Local C C Application Select Local C C Application c The debugger should present main c in a window with the first line of code highlighted in...

Страница 13: ...Holt Integrated Circuits 13...

Страница 14: ...reparations Before running the Demo connect the ribbon cable between the PCIe card and the Break Out board Carefully insert the small ribbon cable to the Mini PCIe Card J4 connector and the other end...

Страница 15: ...chan 0 HIGH READY asserted Setting nMR chan 1 LOW Setting nMR chan 1 HIGH READY asserted Number of Devices found 2 Initial default RT addresses DEV0 RT1 3 DEV0 RT2 1 DEV1 RT1 3 DEV1 RT1 Optionally use...

Страница 16: ...This is useful to see all the system registers at a glance Using sub commands allow moving up and down in memory space This is more useful to see large areas of memory such as RT control blocks BC me...

Страница 17: ...2626 2727 2828 2929 3030 3131 3232 Dev0 MSG 0003 TIME 00042720us BUS A TYPE0 BC to RT CMD1 1BC0 03 R 30 00 DATA 0101 0202 0303 0404 0505 0606 0707 0808 0909 1010 1111 1212 1313 1414 1515 1616 1717 18...

Страница 18: ...303 0404 0505 0606 0707 0808 0909 1010 1111 1212 1313 1414 1515 1616 1717 1818 1919 2020 2121 2222 2323 2424 2525 2626 2727 2828 2929 3030 3131 3232 STA1 1800 Dev0 MSG 0010 TIME 00047602us BUS B TYPE1...

Страница 19: ...in on bus B into the message sequence while running the BC Async demo command a This will only occur once Dev0 MSG 1694 TIME 00070698us BUS B TYPE0 BC to RT CMD1 0822 01 R 01 02 DATA DEAD BEEF STA1 08...

Страница 20: ...v1 b c k RTMT Demo t Traffic Enabled B C K RTMT Demo a A this will be seen much later inter mixed in the messages below With a 2F card a mixed of messages from Dev0 and Dev1 are displayed Dev0 MSG 028...

Страница 21: ...he default is Demo mode Command f reads and displays the states of the FPGA control signals going to both Dev0 and Dev1 The signals are listed in Table 1 in the next section See the next section for a...

Страница 22: ...o Mode vs User Mode For ease of software demonstration a Demo Mode is selected when location INPUT_CONTROL 0x800D is set low and a User Mode is selected when it is high The power up default is Demo Mo...

Страница 23: ...t High to Enable RT1 RT2ENA FPGA Device Enables RT2 0x800B Read Write Set High to Enable RT2 TXINHA TXINHB J4 Connector Inhibits bus 0x800C Read only Hard wired to J4 INPUT_CONTROL FPGA Set Demo mode...

Страница 24: ...re 3 Board References should be pulled high which will drive M2 high For normal use these connections don t need to be altered by the user only if the user wants to customize the Verilog design and wa...

Страница 25: ...oth devices Unique chip select lines nCE0 and nCE1 are used to select between them Table 3 HI 2130 Common Interface Signals to FPGA HI 2130 FPGA BANK PRIMARY CONNECTOR COMMENTS Address pins A15 A0 14...

Страница 26: ...FPGA RT2MC80 34 RT2MC8 output input to FPGA CH0BCENAB0 BCENA 34 YES Default enabled by pull up resistor Can be set low by the connector or the FPGA can override it CH0BCTRIG BCTRIG 34 YES Normally lo...

Страница 27: ...ES Default enabled by pull up resistor Can be set low by the connector or the FPGA can override it CH1BCTRIG BCTRIG 34 YES Normally low Can be pulsed at connector or the FPGA can override it MTRUN1 34...

Страница 28: ...3V3 supply to meet Xilinx power sequencing recommendations to power the SPI Flash MEMS oscillator and the FPGA bank 14 15 and 34 rails Table 6 Power Supply Power Supply Voltage Schematic Name Functio...

Страница 29: ...y Cycle ICC Amps 3 3V 69 ohm load U7 2130 C Temp Board flat open air U8 2130 C Board flat open air 0 100 1 07 70 56 0 1 100 1 86 82 78 0 1 100 1 86 50 with fan 45 with fan 0 1 100 1 78 81 78 0 1 50 1...

Страница 30: ...hassis GND Mounting screw no other connection 10 CHANNEL 1 BPOS MIL STD 1553 CH1 B 11 CHANNEL 1 BNEG MIL STD 1553 CH1 B 12 Chassis GND Mounting screw no other connection 13 CH0INHBIT0 Channel 0 Transm...

Страница 31: ...e design ACTIVE asserts high during any BC RT or SMT command and serves as a good starting point to check when debugging changes to the software or FPGA design See board references for test point boar...

Страница 32: ...Holt Integrated Circuits 32 Figure 3 Board References...

Страница 33: ...summarized the steps necessary to install the Holt Mini PCIe Eclipse project and import the project into Eclipse to allow building the projects and rerunning them See technical guide AN MPCIeVivado T...

Страница 34: ...X F380J476MMAAXEH3 13 1 Res 100 1 1 20W 0201 SMD R7 P122654CT ND Panasonic ERJ 1GNF1000C 14 1 Res 226K 1 1 20W 0201 SMD R2 P122842CT ND Panasonic ERJ 1GNF2263C 15 1 Res 255K 1 1 20W 0201 SMD R5 P12287...

Страница 35: ...96 43875 1 ND TI TPD4E02B04DQAR 39 1 IC Reg Linear 1V 150mA SOT23 5 U3 497 6871 1 ND ST LD39015M10R 40 1 IC Reg Linear 1 2V 150mA SOT23 5 U4 497 6872 1 ND ST LD39015M12R 41 2 IC Inverter 1CH 1 INP SC7...

Страница 36: ...e FFC 20 Pos 0 5mm 5 Long J2B WM11409 ND Molex 0152660213 4 1 24 Inch Triax Plug Cable CH0 AB None MilesTek CA 2014 48 5 1 Aluminum Block 0 75 x2 5 x0 25 Tie Block None OnlineMetals 1142 6 3 Hex Nut 3...

Страница 37: ...X F380J476MMAAXEH3 13 1 Res 100 1 1 20W 0201 SMD R7 P122654CT ND Panasonic ERJ 1GNF1000C 14 1 Res 226K 1 1 20W 0201 SMD R2 P122842CT ND Panasonic ERJ 1GNF2263C 15 1 Res 255K 1 1 20W 0201 SMD R5 P12287...

Страница 38: ...6 43875 1 ND TI TPD4E02B04DQAR 39 1 IC Reg Linear 1V 150mA SOT23 5 U3 497 6871 1 ND ST LD39015M10R 40 1 IC Reg Linear 1 2V 150mA SOT23 5 U4 497 6872 1 ND ST LD39015M12R 41 2 IC Inverter 1CH 1 INP SC70...

Страница 39: ...FC 20 Pos 0 5mm 5 Long J2B WM11409 ND Molex 0152660213 4 2 24 Inch Triax Plug Cable CH0 AB CH1 AB None MilesTek CA 2014 48 5 1 Aluminum Block 0 75 x2 5 x0 25 Tie Block None OnlineMetals 1142 6 3 Hex N...

Страница 40: ...3 B 1 5 Thursday January 16 2020 Title Size Document Number Rev Date Sheet o f Doc A Holt PCIe Mini dual MIL STD 1553 B 1 5 Thursday January 16 2020 C71 0 22uF C16 1uF C9 10pF C1 10uF REFCLK REFCLK PE...

Страница 41: ...1_MRCC_AD5P_15 C15 IO_L12N_T1_MRCC_AD5N_15 B15 IO_L13P_T2_MRCC_15 C16 IO_L13N_T2_MRCC_15 B17 IO_L14P_T2_SRCC_15 B18 IO_L14N_T2_SRCC_15 A18 IO_L19N_T3_A21_VREF_15 C17 VCCO_15 B19 VCCO_15 C14 VCCO_15 C1...

Страница 42: ...MIL STD 1553 B 3 5 Monday September 30 2019 Title Size Document Number Rev Date Sheet o f Doc A Holt PCIe Mini dual MIL STD 1553 B 3 5 Monday September 30 2019 Title Size Document Number Rev Date Shee...

Страница 43: ...MIL STD 1553 B 4 5 Monday September 30 2019 Title Size Document Number Rev Date Sheet o f Doc A Holt PCIe Mini dual MIL STD 1553 B 4 5 Monday September 30 2019 Title Size Document Number Rev Date Shee...

Страница 44: ...STD 1553 B 5 5 Thursday January 16 2020 2x1 6mm 100MHZ OSC U13 OE 1 OUT 3 VDD 4 GND 2 R34 10K R35 10K R32 10K D4 TPD4E02B04DQAR 1 9 2 3 4 7 8 10 6 5 U10A 74LVC2G14 1 6 C63 0 47uF C67 1uF R41 470 U12B...

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