HOLT ADK-2130mPCIe, Техническое руководство

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Holt Integrated Circuits
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HI-2130 Parallel Interfaces
A 16-bit parallel interface implemented in the FPGA is used to interface to both HI-2130 devices. The
address and data bus and a few other signals are common between both devices. Unique chip select
lines nCE0 and nCE1 are used to select between them.
Table 3 - HI-2130 Common Interface Signals to FPGA
HI-2130 FPGA BANK PRIMARY
CONNECTOR
COMMENTS
Address pins: [A15:A0] 14 - Address bus
Data bus pins: [D15:D0] 14 - Bidirectional data bus
nRE 14 - Read strobe (Intel mode)
nWE 14 - Write strobe (Intel mode)
MCLK50 34 - Master 50MHz input clock from FPGA
MTTCLK 34 - Optional clock, TBD
TTCLK 34 - Optional clock, TBD