
Integration Manual
HW 86010
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© Höft & Wessel AG
page 30/46
AM
30.07.04
1.22
IM86010-1-22_.doc
Subject to amendment, errors excepted
3.4.7 I²C
Interface
The I²C interface is a two-wire synchronous serial bus that allows external
hardware to be controlled by HW 86010.
3.4.7.1 Signal
description
Signal
I/O
Description
SDA
I/O Serial data of I²C interface
SCL
O
Clock of I²C interface
When used as output, the SDA signal is open drain with internal pull-up.
The SCL signal is a standard (totem-pole) CMOS output.
3.4.7.2
Characteristics of the I²C bus
The I²C bus is for bi-directional, two-line communication between different
ICs or modules. The two lines are a serial data line (SDA) and a serial clock
line (SCL).
Any I²C system consists in master devices and slave devices. A master is a
device that controls the communication, e.g. generates the SCL clock
signal.
The HW 86010 can only be operated as master device but not as slave
device.
The general concept of the I²C bus allows multiple master devices on the
same bus. This is not supported by HW 86010, i.e. it must be the only
master device on the bus.
3.4.7.3 Interface
parameters
Parameter
Value
Clock rate
43,2 kHz
86,4 kHz
172,8 kHz
345,6 kHz
Содержание HW 86010
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