Travelstar 80GN Hard Disk Drive Specification
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13.13 Read DMA (C8h/C9h)
Table 84: Read DMA command (C8h/C9h)
The Read DMA command reads one or more sectors of data from disk media and then transfers the data from the
device to the host. It transfers the sectors through the Data Register 16 bits at a time.
The host initializes a slave-DMA channel prior to issuing the command. The data transfers are qualified by the
DMARQ and are performed by the slave-DMA channel. The device issues only one interrupt per command to indi-
cate that the data transfer has terminated and that status is available.
If an uncorrectable error occurs, the read will be terminated at the failing sector.
Output parameters to the device
Sector Count
This indicates the number of continuous sectors to be transferred. If zero is specified,
256 sectors will be transferred.
LBA Low
This indicates the sector number of the first sector to be transferred. (L = 0).
In LBA mode, this register specifies that LBA address bits 0–7 are to be transferred
(L = 1)
LBA High/Mid
This indicates the cylinder number of the first sector to be transferred. (L = 0).
In LBA mode this register specifies LBA address bits 8–15 (Mid) and 16–23 (High) to be
transferred. (L = 1)
H
This indicates the head number of the first sector to be transferred. (L = 0).
In LBA mode this register specifies the LBA bits 24–27 to be transferred. (L = 1)
R
This indicates the retry bit, but this bit is ignored.
Command Block Output Registers
Command Block Input Registers
Register
7 6 5 4 3 2 1 0
Register
7 6 5 4 3 2 1 0
Data
- - - - - - - -
Data
- - - - - - - -
Feature
- - - - - - - -
Error
see below
Sector Count
V V V V V V V V
Sector Count
V V V V V V V V
LBA Low
V V V V V V V V
LBA Low
V V V V V V V V
LBA Mid
V V V V V V V V
LBA Mid
V V V V V V V V
LBA High
V V V V V V V V
LBA High
V V V V V V V V
Device
1 L 1 D H H H H
Device
- - - - - H H H H
Command
1 1 0 0 1 0 0 R
Status
see below
Error Register
Status Register
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CRC
UNC
0
IDN
0
ABT
T0N
AMN
BSY RDY
DF
DSC
DRQ
COR IDX
ERR
0
0
0
0
0
V
0
0
0
V
0
-
-
0
-
V
Содержание IC25N020ATMR04
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