Electrical aspects for the companion solution
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5
Electrical aspects for the companion solution
5.1
Pin assignment
The following table lists the pin assignment for the NRP H90-RE and the
NRP H90-RE\F8D8 module.
For the
companion solution
, the following applies:
·
The APP CPU is not used.
·
The pin assignment is fixed. It corresponds to the preloaded netRAPID
90 standard pin assignment, see below.
For the position of pin 1, see section
Pin @
netRAPID
90
Signal
Shared with
Pin @
netX90
Pull-up/
pull-
down/
open
Function for companion solution
1
MII1_TXD2
-
H9
open
Unused
2
MII1_TXD3
-
H8
open
Unused
3
MII1_TXD1
-
J8
open
Unused
4
MII1_TXD0
-
J9
open
Unused
5
MII1_RXD1
-
G8
open
Unused
6
MII1_RXD2
-
F9
open
Unused
7
HIF_RDN
SYNC0 @ MMIO16
E2
pu
SYNC0 (XC_trigger0), leave open if unused
8
HIF_DIRQ
SYNC1 @ MMIO17
F2
pu
SYNC1 (XC_trigger1), leave open if unused
9
VSS (GND)
GND
A1,
A12,
F6, F7,
G6, G7
K3,
M12
Power
VSS (Ground)
10
VDDIO
+3V3
A2,
A11,
L1,
L12
Power
VDDIO (Power supply voltage)
11
HIF_D15
DPM0_SQI_SIO3
A6
pu
Serial host interface (SQI): serial input/output
data 3,
(not supported in companion mode)
12
HIF_D14
DPM0_SQI_SIO2
B6
pu
Serial host interface (SQI): serial input/output
data 2,
(not supported in companion mode)
13
HIF_D13
DPM0_SPI_SIRQ
C6
pu
Serial host interface (SPI): synchron interrupt
request (optional)
14
HIF_D12
DPM0_SPI_DIRQ
A7
pu
Serial host interface (SPI): data interrupt
request (optional)
15
HIF_D11
DPM0_SPI_CLK
B7
pu
Serial host interface (SPI): clock
16
HIF_D10
DPM0_SPI_CSN
C7
pu
Serial host interface (SPI): chip select
17
HIF_D9
DPM0_SPI_MOSI
A8
pu
Serial host interface (SPI), master out / slave in
18
HIF_D8
DPM0_SPI_MISO
B8
pu
Serial host interface (SPI), master in / slave out
19
MMIO7 /
ADC1_IN1
-
L4
pd (deact) Unused, leave open
20
MMIO6 /
ADC1_IN0
-
M4
pd (deact) Unused, leave open
21
MMIO5 /
ADC0_IN1
-
L5
pd (deact) Unused, leave open
netRAPID 90 | Design guide
DOC190601DG01EN | Revision 1 (Draft 10) | English | 2019-09 | Preliminary | Public
© Hilscher 2019