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Rev. 1.3
13
PCI Express backplane diagram
Figure 2-4 shows the PXIe 3U 8slot series backplane
’s PCIe interface.
Slots 2, 3 and 4 are connected to the system slot using PCIe X4. These slots have up to 2 GB/s (single direction)
dedicated bandwidth (X4 Gen-2 PCI Express).
Slots 5 and 8 are connected to the system by a PCIe to PCI bridge.
PXI Local bus
The PXIe backplane local bus is a daisy-chained bus, that connects each peripheral slot with adjacent peripheral
slots to the left and right.
The backplane routes PXI Local Bus 6 between all slots. The left Local Bus 6 from Slot 1 is not routed anywhere
and the right local bus signal from slot 8 is not routed anywhere.
Local bus signals may range from high-speed TTL signals to analog signals as high as 42 V.
