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8

DATA OUTPUT FORMAT 

Data is output serially with the first bit being status (STA).  The status bit is high when 
virtual absolute position is not known.  After a small initial movement the status bit 
should go low and stay low.  The second bit is the MSB of the position word.  Following 
the LSB of the position word are three flags bits.  Flag 1 goes high when a decoding error 
occurs.  Flag 2 goes high when either the analog signal amplitudes become too low ( Sin 
or Cosine < 1Vpp) or the Index signal transitions are occurring in the wrong place.  Flag 
3 goes high when a quadrature error is detected.  This occurs if SIN and COS states 
change by more than 90 degrees between a sample.   A flag bit is set by an error and will 
be held until a read is completed.  The next bit is a parity bit.  The parity of all the bits is 
odd. 

TABLE 2:  Data format 

BIT POSITION 

BIT NAME 

DESCRIPTION 

Bit 1 

STA 

VA Decoder Status Bit. 

Bit 2 thru Bit (n+1) 

D

MSB

..

D

LSB

 

Position bits. 

Bit (n+2) 

Flag 3 

Quadrature error. 

Bit (n+3) 

Flag 2 

Signal quality watchdog. 

Bit (n+4) 

Flag 1 

VA decoder error. 

Bit (n+5) 

Parity 

Parity bit.  Parity is odd. 

Bit (n+6) 

(0 bit) 

Trailing zero bit. 

* n is the number of position bits

Содержание VJ

Страница 1: ...2181 USA Phone 518 272 6300 Toll free 800 759 1844 Fax 518 274 0336 Email encoders gurley com Gurley Precision Instruments VJXXXXXXXXN S N xxxxxxx Model VJ Virtual Absolute Interpolating Decoder USER...

Страница 2: ...interface can be used as standard SSI with a single input CLK signal differential pair and single output DATA signal differential pair There is an optional Sync input differential pair that allows for...

Страница 3: ...Z Digital Index Code track Y Digital Cosine 1X X Digital Sine 1X S Data valid when high GND J2 OUTPUT CONNECTOR J1 INPUT CONNECTOR LED D1 DIGITAL TEST POINTS ANALOG TEST POINTS INSTALLATION Connect a...

Страница 4: ...4...

Страница 5: ...or shield connection 6 GND power and signal ground 7 SYNC Optional RS422 input 8 DATA RS422 output SSI Data 9 DATA RS422 output SSI Data The serial interface timing is shown in figures 2 and 3 Figure...

Страница 6: ...5 uSec Twait Wait Time 0 uSec Tch Tcl Clock high time 120 nSec Tcl Clock low time 120 nSec FIGURE 3 Timing diagram when using optional SYNC input STA DMSB DMSB 1 PARITY Flag1 Flag2 Flag3 DLSB CLOCK DA...

Страница 7: ...the adjustment is to slightly move readhead until the LED D1 remains lit without blinking when slowly rotating the disk A better method is to monitor the voltage on Testpoint U and adjust the read hea...

Страница 8: ...the Index signal transitions are occurring in the wrong place Flag 3 goes high when a quadrature error is detected This occurs if SIN and COS states change by more than 90 degrees between a sample A f...

Страница 9: ...shipping is specifically excluded from warranty This warranty is exclusive and GPI makes no other representation of any other kind expressed or implied with respect to the product including its merch...

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