Guardian G25AMK005, Техническое руководство

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2-6 G U A R D I A N V H F 1 1 0 W M O B I L E
2.4.1.5 3.3V Linear Logic Supply
The output from the 4.5V switch mode power supply is passed through 3.3V linear power supplies to remove any
remaining power supply switching noise on the main logic supply. One 3.3V supply is used for control logic, the
other 3.3V, 50 mA supply is used for control logic analog circuitry.
2.4.1.6 Reset Generator
This circuit uses a MPU supervisory device (MAX825) to generate a reset pulse of at least 140 ms whenever the
3.3V logic supply drops below 3.08V. The circuit also generates a reset signal when the watchdog input is asserted
by H8 or DSP.
2.4.1.7 5V Linear Logic Supply
This circuit generates a 5V logic supply at 50 mA maximum for use on the control logic.
2.4.1.8 Audio Supplies
Two linear regulators providing clean filtered supplies for the audio at 5V are provided. The audio power amplifiers
use the 5V, 800 mA audio supply. The audio supply is used for the low-current microphone amplifier. A linear 5V
bias supply to the internal microphone is also provided.
2.4.1.9 H8 Microcontroller
H8 is the main controller for the radio and is a HD6433044 ROM-less microcontroller. H8 is configured with an
expanded bus connected to the Flash, RAM, and DSP. The H8 integral bus arbitration logic allows H8 and DSP to
both have access to the Flash and RAM. H8 is clocked by the external TCXO.
H8 is powered from the 3.3V logic supply, and reset by the hardware /RES line. A watchdog output to the hardware-
reset circuitry is provided. H8 generates chip select outputs to allow the Flash, RAM, FPGA, and DSP host port to
be separately addressed.
One serial port of H8 is used to implement a bidirectional synchronous serial interface to the keypad board. This
interface is used to communicate with the keypad MPU and directly load the LCD controller. The clock on this
interface runs at 100 kHz. An associated interrupt input to H8 is used to initiate transfers from the keypad to H8.
This serial interface is also used to load the output expander in the FPGA, and also to configure the FPGA.
One serial port of H8 is used to implement a bidirectional asynchronous serial interface to an external PC used for
programming, filling, and controlling the radio. This interface uses programmable standard baud rates (default 9600
baud) and standard data formats. There are no handshaking parallel lines associated with this interface. Two parallel
I/O lines on H8 are used to generate an I
2
C interface to allow the EEPROM on the transceiver to be accessed. Four
parallel output lines on H8 are used to generate a synchronous serial output bus with clock and data and separate
strobe lines for the DAC, control shift register, and synthesizer on the transceiver.
One H8 DAC output is used to generate simple audio tones of varying volume for use as audio alerts. The second
H8 DAC output is available for VCTCXOP control. The six-channel ADC is used to measure: the raw supply
voltage, WRU radio input, reference crystal temperature, PA temperature, PA current, and RSSI. Two I/O lines are
used to implement software UART, used for debug outputs in the development environment.
2.4.1.10 H8 Input Requirements
The total requirements for parallel input signals to H8, which need to be polled on a regular basis are:
OOL: Out-of-lock (OOL) signal from the transceiver synthesizer
EXT PTT: External PTT
PWROFF: On/off switch position
CONFDONE: Configuration status of FPGA
2.4.1.11 H8 Output Requirements
The total requirements for parallel output signals from H8, which need to be controlled are as below. A serial load
output latch in the FPGA expands the output capabilities of H8.