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2Introduction 2.6Development Board Description
DBUG393-1.0E 7(16)
2.6 Development Board Description
Table 2-1 Development Board Description
No. Name Functional Description Technical Condition Note
1 FPGA Core chip – –
2 Download
Supports JTAG and
AUTOBOOT
USB download interface –
3
Power
Supply
Provides 5V input; 3.3 V,
1.8V and 0.9V/ 1.2 V
output via LDO circuit
Input power: 5V
Provides power for
download circuit and other
circuits via the 5V to 3.3 V
circuit;
Provides power for FPGA
via 5V to 1.8V circuit;
Provides power for FPGA
via 3.3V to 0.9V/1.2V
circuit.
–
4 Switches Available for SPMI test 4 –
5 Dip switch
Available for
multiplexing IO test
1 –
6 Reset key FPGA reset 1 –
7 LED
Test indicator, DONE
indicator, Power
indicator 2 test indicators, green;
1 DONE indicator, green
1 Power indicator, green
–
8
Crystal
Oscillator Provide 12MHz/ 50MHz
clock for FPGA
Package5032 –
9 GPIO
I/O for user to extend
and test
17 –
10
Select Bank
voltage
Available for FPGA bank
voltage and core voltage
test
3 –
11 Voltage – Input Voltage: 5V –
12 Humidity – 95% –
13 Temperature – Operating range: –20°~70° –