Gibson MM516, Руководство пользователя

Страница: 40 / 57

MM516
User's Manual
40
Revision 1.4 7-8-2011
Hardware Description Manual
Table 8 PSKEY_PCM_LOW_JITTER_CONFIG Description
5.5 I/O Parallel Ports
Fifteen lines of programmable bidirectional input/outputs (I/O) are provided. PIO[11:8] and PIO[3:0] are powered
from VDD_PIO. PIO[7:4] are powered from VDD_PADS. AIO [2:0] are powered from VDD_MEM.
PIO lines can be configured through software to have either weak or strong pull-ups or pull-downs. All PIO lines are
configured as inputs with weak pull-downs at reset.
PIO[0] and PIO[1] are normally dedicated to RXEN and TXEN respectively, but they are available for general use.
Any of the PIO lines can be configured as interrupt request lines or as wake-up lines from sleep modes. PIO[6] or
PIO[2] can be configured as a request line for an external clock source. This is useful when the clock to BlueCore 5-
External is provided from a system ASIC. Using PSKEY_CLOCK_REQUEST_ENABLE (0x246), this terminal can be
configured to be low when BlueCore 5 chip is in Deep Sleep and high when a clock is
required. The clock must be supplied within 4ms of the rising edge of PIO[6] or PIO[2] to avoid losing timing accuracy
in certain Bluetooth operating modes.
BlueCore 5 chip has three general purpose analog interface pins, AIO[0], AIO[1] and AIO[2]. These are used
to access internal circuitry and control signals. One pin is allocated to decoupling for the on-chip band gap reference
voltage, the other two may be configured to provide additional functionality.
Auxiliary functions available via these pins include an 8-bit ADC and an 8-bit DAC. Typically the ADC is used for
battery voltage measurement. Signals selectable at these pins include the band gap reference voltage and a variety
of clock signals: 48, 24, 16, 8MHz and the XTAL clock frequency. When used with analog signals, the voltage
range is constrained by the analog supply voltage (1.8V). When configured to drive out digital level signals (e.g.,
clocks), the output voltage level is determined by VDD_MEM (1.8V).
5.5.1 PIO Defaults
CSR, maker of the BlueCore 5 chip, cannot guarantee that these terminal functions remain the same. Refer to the software
release note for the implementation of these PIO lines, as they are firmware build-specific.
5.6 I2C Interface
PIO[8:6] can be used to form a master I2C interface. The interface is formed using software to drive these lines.
Therefore, it is suited only to relatively slow functions such as driving a dot matrix LCD, keyboard scanner or
EEPROM.
Any three PIOs can be used as a master I2C interface by configuring the hardware bit serializer with suitable firmware.
The strong pull-ups in the PIO pads eliminate the need for external pull-up resistors.
Note:
PIO lines need to be pulled-up through 2.2k resistors.
PIO[7:6] dual functions, UART bypass and EEPROM support, therefore, devices using an EEPROM cannot
support UART bypass mode.