Avila Network Computer Operating Manual
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2. CONFIGURATION AND INSTALLATION
The following section gives memory, interrupt, I2C and digital I/O mappings
specific to the GW2345. See the
Intel IXP4XX Product Line and IXC1100 Control
Plane Processors Developer’s Manual
for more information on these interfaces.
2.1. Memory
Mapping
The memory map and Expansion bus chip select mapping for the GW2345 is
shown below.
Memory Address
Size
Description
0000_0000 – 0FFF_FFFF
256Mbyte
Flash Memory (32Mbyte max)
0100_0000 – 2FFF_FFFF
756Mbyte
SDRAM Memory (128 Mbyte max)
3000_0000 – 3FFF_FFFF
Reserved
4000_0000 – 47FF_FFFF
Reserved
4800_0000 – 4FFF_FFFF
128Mbyte
PCI Bus
5000_0000 – 5FFF_FFFF
256Mbyte
Expansion Bus
6000_0000 – 63FF_FFFF
64Mbyte
Queue Manager
6400_0000 – BFFF_FFFF
Reserved
C000_0000 – C3FF_FFFF
64Mbyte
PCI Controller Configuration and Status
C400_0000 – C7FF_FFFF
64Mbyte
Expansion Bus Configuration
C800_0000 – C800_0FFF
1Kbyte
COM1 Serial Port
C800_1000 – C800_1FFF
1Kbyte
COM2 Serial Port
C800_2000 – C8FF_2FFF
1Kbyte
Performance Monitor
C800_3000 – C8FF_3FFF
1Kbyte
Interrupt Controller
C800_4000 – C8FF_4FFF
1Kbyte
GPIO Controller
C800_5000 – C8FF_5FFF
1Kbyte
Timers
C800_6000 – C8FF_6FFF
1Kbyte
Reserved
C800_7000 – C8FF_7FFF
1Kbyte
Reserved
C800_8000 – C8FF_8FFF
1Kbyte
Reserved
C800_9000 – C8FF_9FFF
1Kbyte
Ethernet MAC A
C800_A000 – C8FF_AFFF
1Kbyte
Ethernet MAC B
C800_B000 – C8FF_BFFF
1Kbyte
USB Controller
C800_C000 – C800_FFFF
Reserved
C801_0000 – CBFF_FFFF
Reserved
CC00_C000 – CC00_00FF
256byte
SDRAM Configuration Registers
CC00_0100 – FFFF_FFFF
Reserved
Note: The bottom 256Mbytes is configurable through bit 31 of the EXP_CONFG0 register.
Memory Map
Chip
Select
Description
CS0
Flash Memory (U3)
CS1
CompactFlash Socket #CS0 (J5)
CS2
CompactFlash Socket #CS1 (J5)
CS3
Flash Memory (U4)
CS4-CS7 Not
Used
Expansion Bus Chip Selects
