8 - 10
C141-E103-01EN
8.7
Servo Control
The servomechanism is controlled using a digital servo technique by the firmware in the digital
signal processor (DSP).
DPS carries out VCM control. Control of the voice coil motor consists of track-following
operation control and seek operation control. Track-following operation is controlled to center the
data-head-mounted actuator over the target cylinder for read/write operation. The seek operation
moves the actuator to a different target cylinder at high speed. For stable operation, a variety of
calibration is done (see Section 8.5).
8.7.1
Servo control circuit
Figure 8.4 is the block diagram of the servo control circuit. The following explains each function
of the servo control circuit.
bus16
FET
×
3
MCU
FMC16
DSP controlled actuator servo system
MCU controlled spindle servo system
Servo
demodulator
bus16
bus16
Control
signal
bus16
Data
head
Servo system block diagram
DSP
Core
Drive
I/F LSI
HDC
bus8
SPM/VCM
combo
FET
ARRY
VCM
Spindle
motor
Control signal
(PWM)
Data surface
signal
Processor
Figure 8.4
Block diagram of servo control circuit (MAJ3364)
(1)
Processor-ASIC (Processor-application specific IC)
A DSP controls the spindle motor and the voice coil motor. The SCSI sends an instruction to the
DSP through the SCSI control MCU via drive interface. The Processor is a 1-chip ASIC, and also
contains an analog-to-digital converter, a digital-to-analog converter, RAM, and other logic
circuits.
(2)
Servo demodulator
As explained in 8.7.2, servo signals consist of a training segment, a Servo Mark segment, a
Position segment and a Gray Code segment, and 84 frames for MAJ series and 108 frames for
MAH series are arranged around the circumference. In the servo demodulator, the Gray Code and
Position signals from the servo signal are demodulated and used to control head positioning.
Содержание MAH3091MC - Enterprise 9.1 GB Hard Drive
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Страница 57: ...C141 E103 01EN 4 4 3 175 0 25 Figure 4 3 External dimensions MAJ series MC model ...
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Страница 85: ...C141 E103 01EN 5 4 3 Connecting more than one IDD multi host Figure 5 1 SCSI bus connections 2 of 2 ...
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Страница 127: ...8 4 C141 E103 01EN Servo Demodulator Buffer DRAM 1 Mbit 32 4 MByte Read Channel Figure 8 1 Circuit configuration ...
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Страница 145: ...C141 E103 01EN B 1 APPENDIX B SETTING TERMINALS B 1 Setting Terminals This appendix describes setting terminals ...
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