Model VM32PAFF
32 Channel VME Module
Programmable Amplifier
Programming
With Fixed Frequency Filter
16
1784 Chessie Lane., Ottawa, IL 61350
•
Tel: 800/252-7074, 815/434-7800
•
FAX:815/434-8176
e-mail: [email protected]
•
Web Address: http://www.freqdev.com
The Channel Address Register or CHADR (located at Base A 0) holds the address of the daughter
module being addressed. The first amplifier channel, Channel 0, has an address of (00)x and the last
amplifier channel, Channel 31, has an address of (1F)x. The channel addresses occupy the lowest five
LSB’s of CHADR, that is, from B00 up to B04. One bit of this register is also used as a flag to indicate that
the serial interface is busy and new data cannot be accepted until this bit is cleared. This BUSY interlock
bit is located at the MSB of CHADR, or B15.
The Data Register or DATA (located at Base A 2) holds the binary representation of a specific
channel gain. Only the four lowest LSB’s of DATA are used. Writing data to these bits when BUSY is clear,
sets the gain of the channel pointed to by CHADR. When a readback of a channel’s gain setting is
requested by setting BUSY, the current channel gain setting appears in DATA once BUSY clears. The
lowest gain setting (-12dB) is set by writing a (0)x to DATA and the highest gain setting (+60dB) is set by
writing a (C)x to DATA.
Table 5-1
shows DATA gain settings.
Gain Weight
Gain
Encoded
Value
Encoded
Value
(Vo/Vi)
(dB)
(decimal)
(hex)
¼
-12.04
0
0
½
-6.02
1
1
1
0.00
2
2
2
+6.02
3
3
4
+12.04
4
4
8
+18.06
5
5
16
+24.08
6
6
32
+30.10
7
7
64
+36.12
8
8
128
+42.14
9
9
256
+48.16
10
A
512
+54.19
11
B
1024
+60.21
12
C
Table 5-1: DATA register gain settings.
The Reset Register or RESET (located at Base A 4) allows the user to set all channels on the
board simultaneously to their minimum gain setting. This is useful for system initialization and in auto-
ranging applications. Writing anything to RESET transfers all zero data to all of the channels
simultaneously. The data written is irrelevant. Readback requests on this location return random data.
The reset function uses the BUSY interlock just as a normal write to DATA would.
