Frequency Devices VM32PAFF Скачать руководство пользователя страница 12 | Manualshive

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Model VM32PAFF

32 Channel VME Module

Programmable Amplifier

Hardware Preparation

With Fixed Frequency Filter

VM32PAFF

Figure 4-2: VM32PAFF Front Panel

The analog input connector is a female 78-pin D-shell connector.

The analog output connectors are two male 44-pin D-shell connectors.

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1784 Chessie Lane., Ottawa, IL 61350

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Tel: 800/252-7074, 815/434-7800

•

FAX:815/434-8176

e-mail: [email protected]

•

Web Address: http://www.freqdev.com

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Содержание VM32PAFF

Страница 1: ...ments recommendations or suggestions herein in conjunction with our conditions of sale which apply to all goods supplied by us We assume no responsibility for the use of these statements recommendatio...

Страница 2: ...ware Configuration 9 Board Installation 11 I O Connections and the Front Panel 11 Connector Cable Information and I O Connections 13 5 Programming 15 Register Level Programming 15 Programming Procedur...

Страница 3: ...The boards receive up to thirty two differential signal inputs through two shielded front panel connectors and provide signal buffering software programmable gain from 12dB to 60dB in 6dB steps and f...

Страница 4: ...single ended 1VRMS Output RL 2k 86 dB 1 kHz differential Gain 16 Gain Programmimg G 0 25X to 1024X in factors of 2 1 before filtering 32 chls programmed over VMEbus with read back 17 Gain Accuracy DC...

Страница 5: ...ebugging newly developed systems and for constructing reliable test header files The motherboard uses an indexed channel addressing scheme and transfers gain data to from the selected channel over a s...

Страница 6: ...s a high impedance differential input with high common mode rejection capability The differential inputs for the channel are converted to a single ended signal before being applied to the gain amplifi...

Страница 7: ...log low pass filter The corner frequency for each filter is user specified between 100 Hz and 100 kHz There is no bypass mode for the anti alias filter Output Amplifiers The output of each filter modu...

Страница 8: ...fully inspect the exterior of the package for evidence of damage After noting areas of possible shipping damage open and unpack the shipping container being careful to preserve the container and packi...

Страница 9: ...installed The Base Address is the only hardware configuration on the VM32PAFF board The factory set Base Address is 2000 hex Before attempting to use the board the user should set verify the base add...

Страница 10: ...ed Frequency Filter Figure 4 1 VM32PAFF Base Address Configuration Jumpers An installed jumper sets a logic 1 while a missing jumper sets a logic 0 10 1784 Chessie Lane Ottawa IL 61350 Tel 800 252 707...

Страница 11: ...terrupts or bus mastering capabilities but passes all VMEbus daisy chained signals automatically The major considerations in locating the VM32PAFF board in the mainframe are for EMI and I O signal cab...

Страница 12: ...2PAFF Figure 4 2 VM32PAFF Front Panel The analog input connector is a female 78 pin D shell connector The analog output connectors are two male 44 pin D shell connectors 12 1784 Chessie Lane Ottawa IL...

Страница 13: ...Channel 04 Lo 72 Channel 20 Lo 64 Channel 05 Hi 52 Channel 21 Hi 44 Channel 05 Lo 53 Channel 21 Lo 45 Channel 06 Hi 33 Channel 22 Hi 25 Channel 06 Lo 34 Channel 22 Lo 26 Channel 07 Hi 13 Channel 23 H...

Страница 14: ...nnel 04 Lo 20 Channel 20 Lo 20 Channel 05 Hi 6 Channel 21 Hi 6 Channel 05 Lo 5 Channel 21 Lo 5 Channel 06 Hi 37 Channel 22 Hi 37 Channel 06 Lo 36 Channel 22 Lo 36 Channel 07 Hi 23 Channel 23 Hi 23 Cha...

Страница 15: ...to initiate readback og gain setting for channel pointed to by CH 4 0 Automatically clears when transfer to from the selected channel is complete MSB B15 B08 B07 LSB B00 0 0 0 0 0 0 0 0 0 0 0 0 G3 G2...

Страница 16: ...ed Writing data to these bits when BUSY is clear sets the gain of the channel pointed to by CHADR When a readback of a channel s gain setting is requested by setting BUSY the current channel gain sett...

Страница 17: ...o CHADR making sure to write a 1 to the BUSY bit The serial interface accesses gain data from the selected channel and clears the BUSY bit in CHADR when the requested data is available in DATA The req...

Страница 18: ...ny channel settings This event is not flagged so it is important to use the BUSY interlock before reading the Data Register It is not possible to write 0 to the BUSY bit from the VMEbus so this is not...

Страница 19: ...lso be faxed to 815 434 8176 or emailed to sales freqdev com If you need to contact Frequency Devices in writing our address is 1784 Chessie Lane Ottawa IL 61350 Attn Customer Service Please have the...

Страница 20: ...on which the original identification marks have been removed or altered These warranties will not apply if adjustment repair or parts replacement is required because of accident neglect misuse power...

Страница 21: ...mmendations or suggestions nor do we intend them as a recommendation for any use which would infringe any patent or copyright 21 1784 Chessie Lane Ottawa IL 61350 Tel 800 252 7074 815 434 7800 FAX 815...

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