Freescale Semiconductor LS1043ARDB, Быстрый старт

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Table 4. SW5 configuration
Switch Name Description ON (1) / OFF (0) setting
SW5[2] SYSCLK_SEL Differential SYSCLK select
• 0: Differential SYSCLK (default value)
• 1: Single-end system clock
0
SW5[3] CFG_TEST_SEL_B CFG_TEST_SEL for the LS1043A processor
• 0: Disables cores 3 and 4
• 1: Enables all cores (default value)
1
SW5[4] BANK_SEL0 Virtual bank select
• 000: No change (default value)
• 001: Virtual bank #1
• … …
• 111: Virtual bank #7
0
SW5[5] BANK_SEL1 0
SW5[6] BANK_SEL2 0
SW5[7] SW_SVR1 SVR[1:0]
• 00: Reserved (default value for
LS1043A)
0
SW5[8] SW_SVR0 0
6 Jumper settings
The table below lists the factory default jumper settings for the LS1043ARDB.
Table 5. LS1043ARDB jumper settings
Jumper Size Name/function Description
J5 1x2 pin Remote reset • Open: No activity (default value)
• Shorted: Reset the board
J6 1x2 pin Power switch • Open: Power switch is functional
(default value)
• Shorted: Power switch is disabled
J9
1
1x3 pin SPICS and SDHC Dat[4:7] voltage
selection • 1-2 shorted: 1.8 V (default value)
• 2-3 shorted: 3.3 V
J10 1x2 pin FA_VL pin voltage setting • Open: GND
• Shorted: 1.0 V (default value)
J12 1x2 pin PWR_PROG_MTR voltage setting • Open: GND (default value)
• Shorted: 1.8 V
J13 1x2 pin PWR_PROG_SFP voltage setting • Open: GND (default value)
• Shorted: 1.8 V
J14 1x2 pin TA_BB_VDD voltage setting • Open: GND
• Shorted: 1.0 V (default value)
J15
1
1x3 pin SPI bus voltage setting • 1-2 shorted: 1.8 V (default value)
• 2-3 shorted: 3.3 V
J22 1x3 pin External power for power amplifier
(PA) voltage for some Wi-Fi cards • 1-2 shorted: 3.3 V (default value)
• 2-3 shorted: 5.0 V
1. J9 and J15 only exist on the SCH-28529 Rev. A1 board.
The figure below shows the jumper locations.
Jumper settings
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
8 Freescale Semiconductor, Inc.