Freescale Semiconductor Energy Efficient Solutions Xtrinsic MMA8452Q, Технические данные: Техническая информация

Страница: 5 / 50

MMA8452Q
Sensors
Freescale Semiconductor, Inc.
5
The device power is supplied through VDD line. Power supply decoupling capacitors (100 nF ceramic plus 4.7 µF bulk, or a
single 4.7 µF ceramic) should be placed as near as possible to the pins 1 and 14 of the device.
The control signals SCL, SDA, and SA0 are not tolerant of voltages more than VDDIO + 0.3V. If VDDIO is removed, the control
signals SCL, SDA, and SA0 will clamp any logic signals with their internal ESD protection diodes.
The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) are user programmable through the I
2
C
interface. The SDA and SCL I
2
C connections are open drain and therefore require a pullup resistor as shown in the application
diagram in Figure 4 .
1.1 Soldering Information
The QFN package is compliant with the RoHS standard. Please refer to AN4077.
Table 1. Pin Descriptions
Pin # Pin Name Description
1 VDDIO Internal Power Supply (1.62V - 3.6V)
2 BYP Bypass capacitor (0.1
μ
F)
3 DNC Do not connect to anything, leave pin isolated and floating.
4 SCL
I
2
C Serial Clock, open drain
5 GND Connect to Ground
6 SDA
I
2
C Serial Data
7 SA0
I
2
C Least Significant Bit of the Device I
2
C Address, I
2
C 7-bit address = 0x1C (SA0=0), 0x1D (SA0=1).
8 NC Internally not connected
9 INT2 Inertial Interrupt 2, output pin
10 GND Connect to Ground
11 INT1 Inertial Interrupt 1, output pin
12 GND Connect to Ground
13 NC Internally not connected
14 VDD Power Supply (1.95 V to 3.6 V)
15 NC Internally not connected
16 NC Internally not connected (can be GND or VDD)