Freescale Semiconductor Energy Efficient Solutions Xtrinsic MMA8452Q, Технические данные: Техническая информация

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MMA8452Q
Sensors
Freescale Semiconductor, Inc.
15
5.9 Interrupt Register Configurations
There are six configurable interrupts in the MMA8452Q: Data Ready, Motion/Freefall, Pulse, Orientation, Transient, and Auto-
SLEEP events. These six interrupt sources can be routed to one of two interrupt pins. The interrupt source must be enabled and
configured. If the event flag is asserted because the event condition is detected, the corresponding interrupt pin, INT1 or INT2,
will assert.
Figure 10. System Interrupt Generation Block Diagram
5.10 Serial I
2
C Interface
Acceleration data may be accessed through an I
2
C interface thus making the device particularly suitable for direct interfacing
with a microcontroller. The MMA8452Q features an interrupt signal which indicates when a new set of measured acceleration
data is available thus simplifying data synchronization in the digital system that uses the device. The MMA8452Q may also be
configured to generate other interrupt signals accordingly to the programmable embedded functions of the device for Motion,
Freefall, Transient, Orientation, and Pulse.
The registers embedded inside the MMA8452Q are accessed through the I
2
C serial interface ( Table 9 ). To enable the I
2
C
interface, VDDIO line must be tied high (i.e., to the interface supply voltage). If VDD is not present and VDDIO is present, the
MMA8452Q is in off mode and communications on the I
2
C interface are ignored. The I
2
C interface may be used for
communications between other I
2
C devices and the MMA8452Q does not affect the I
2
C bus.
There are two signals associated with the I
2
C bus; the Serial Clock Line (SCL) and the Serial Data line (SDA). The latter is a
bidirectional line used for sending and receiving the data to/from the interface. External pullup resistors connected to VDDIO are
expected for SDA and SCL. When the bus is free both the lines are high. The I
2
C interface is compliant with fast mode (400 kHz),
and Normal mode (100 kHz) I
2
C standards ( Table 5 ).
Table 9. Serial Interface Pin Description
Pin Name Pin Description
SCL I
2
C Serial Clock
SDA I
2
C Serial Data
SA0 I
2
C least significant bit of the device address
INTERRUPT
CONTROLLER
Data Ready
Motion/Freefall
Pulse
Orientation
Transient
Auto-SLEEP
INT ENABLE INT CFG
INT1
INT2
6 6