
Power Supply
Technical Summary, Rev. 0
Freescale Semiconductor
2-5
Preliminary
2.5 External Interrupts
Two on-board pushbutton switches are provided for external interrupt generation, as shown in
Figure 2-2
. S2 allows the user to generate a hardware interrupt, IRQ #1, using GPIO Port B,
Bit 2. S3 allows the user to generate a hardware interrupt, IRQ #2, using GPIO Port B, Bit 3.
These two switches allow the user to generate interrupts for their user-specific programs.
Alternately, the user can use GPIO Port B, Bit 4, for IRQ #1. To accomplish this, remove the
jumper at JP5, pins 1 and 2, and place the jumper between JP5 pins 2 and 3. Also, the user can
use GPIO Port B, Bit 5, for IRQ #2. To accomplish this, remove the jumper at JP6, pins 1 and 2,
and place the jumper between JP6 pins 2 and 3.
56F8037
GPIOB2
GPIOB3
+3.3V
+3.3V
4.7K
4.7K
S2
S3
GPIOB4
GPIOB5
JG5
1
3
JG6
1
3
2
2
Figure 2-2. Schematic Diagram of the User Interrupt Interface
2.6 Reset
Logic is provided on the 56F8037 to generate an internal Power-On RESET. Additional reset
logic is provided to support the RESET signal from the JTAG connector and the user RESET
pushbutton, S1; refer to the schematics in
Appendix A
.
2.7 Power Supply
The 56F8037EVM supports the option of power being provided from three different sources.
Since only one power supply source can be active at one time, the selection of the active power
supply source is made by the jumper group formed by JG1 and JG2.
Table 2-5
depicts the
jumper options for selecting each power supply source. Jumpering JG2, pins 2 and 3, the default
selection, selects the USB power supply source. Jumpering JG2, pins 1 and 2, selects the external
power supply source. Jumpering JG1 to JG2, pin 2, uses the Daughter Card power source.
Содержание 56F8037
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