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L850-GL Hardware User Manual Page 29 of 54
+3.3V
PERST#
RESET#
Module State
Restart
Activation
FULL_CARD_POWER_OFF#
typical 10s
PMU RESET
Activation
t
res1
t
res1
t
res2
Figure 3-9 Reset control timing2
nd
Index
Minimum
Typical
Notes
t
res1
10ms
30ms
RESET# should asserted time
t
res2
0ms
30ms
PERST# should asserted after RESET#.
PERST# is not required for modem restart, thus this pin can be
remains high during restart
Note:
RESET# is a sensitive signal, it’s recommended to add a filter capacitor close to the module. In
case of PCB layout, the RESET# signal lines should keep away from the RF interference and
protected by GND. Also, the RESET# signal lines shall neither near the PCB edge nor route on
the surface planes to avoid module from reset caused by ESD problems.
3.3.4 PCIe Reset
Module supports PCIe goes in to D3cold L2 state in Win10 system. The D0->D3cold L2@S0/S0ix/S3
->D0 timing is shown in figure 3-10:
Figure 3-10 PCIe reset timing