Eurotech CPU-1450, Руководство пользователя, Страница: 29 / 43

29 Soft Power Management Registers
PM1_CNT—Power Management 1 Control Register
I/O Address 6004h
(ACPI PM1a_EVT_BLK) Attribute R/W
Default Value 0000h
Size 32-bit
Lockable No
Usage ACPI or Legacy
Power Well Bits 0–7: Core,
Bits 8–15: Resume
Bit Description
13 Sleep Enable (SLP_EN)—WO. Setting this bit causes the system to sequence into the Sleep state defined by the SLP_TYP
field.
12:10 Sleep Type (SLP_TYP)—R/W. This 3-bit field defines the type of Sleep the system should enter when the SLP_EN bit is set to
1.
000 = ON: Typically maps to S0 state
.
011 = Reserved
100 = Reserved
101 = Suspend-To-RAM. Assert SLP_S1# and SLP_S3#; typically, maps to S3 state.
110 = Suspend-To-Disk. Assert SLP_S1#, SLP_S3#, and SLP_S5# SLP_S3# and, SLP_S5#; typically, maps to S4 state.
111 = Soft Off. Assert SLP_S1#, SLP_S3#, and SLP_S5# SLP_S3#, and SLP_S5#; typically, maps to S5 state.
2 Global Release (GBL_RLS)—WO.
1 = ACPI software writes a 1 to this bit to raise an event to the BIOS. BIOS software has corresponding enable and status bits
to control its ability to receive ACPI events.
0 = This bit always reads as 0.
1 ICH2 (82801BA):
Reserved
ICH2-M (82801BAM):
Bus Master Reload (BM_RLD)— R/W. This bit is reset to 0 by PCIRST#
0 = Bus master requests do not cause a break from the C3 state.
1 = Enable Bus Master requests (internal, external or AGPBUSY#) to cause a break from the C3 state.
0 SCI Enable (SCI_EN)—R/W. Selects the SCI interrupt or the SMI# interrupt for various events including the bits in the
PM1_STS register (bit 10, 8, 0), and bits in GPE0_STS.
0 = These events will generate an SMI#.
1 = These events will generate an SCI.
001 = ICH2 (82801BA): Assert STPCLK#. Puts processor in Stop-Grant state. Optional to assert
CPUSLP# to put processor in sleep state: Typically, maps to S1 state.
ICH2-M (82801BAM): Reserved.
010 = ICH2 (82801BA): Reserved
ICH2-M (82801BAM): Assert SLP_S1#: Typically, maps to S1 state.
An0065. CPU-1450 Soft Power Management
Table 12. PM1_CNT—Power Management 1 Control Register