Eurotech CPU-1450, Руководство пользователя, Страница: 23 / 43

23 SPM Management
Wake-up events
The hardware of the CPU-1450 has been developed to allow the user to manage the Soft Power
Management modes with the following wake-up event sources:
Serial Port Ring Indicator pin
Ethernet
External Power Button
Wake on RTC
All the possible wake-up events can be enabled or disabled by setting the Soft Power Enable Registers. The
user can also know what event has occurred to turn-on the power by reading the Soft Power Status
Registers. Note that the status bit gets set if the wake-up event occurs, whether or not it is enable as a wake-
up function by setting the corresponding bit in Soft Power Enable Register. However only the enabled wake-
up functions will turn the system power on.
Serial port Ring Indicator
The hardware wake-up event from the sleeping state is activated with a high signal at this pin. Levels should
be greater than 3V because this signal is applied to a GATE of a transistor that drives the RI pin of the ICH2.
Furthermore
the high level must be applied using a current limiting resistor, the limiting resistor has to be
1kOhm for each volt applied, limiting the current below 1mA.
Note that Filtering / De-bounce on RI# will not be done in ICH2 or in CPU-1450.
Please refer to Chapter 6 for a practical example using the wake on nRINGING functionality.
Ethernet
The CPU-1450 module uses the Ethernet controller integrated into ICH2. This controller is compliant to ACPI
(Rev. 1.0), PCI Power management (Rev 1.0) and monitors the network looking for a Wake-up Frame, a
Magic Packet or a Link change and notifies the event via the internal PME# signal.
Magic Packet from the network
A remote Computer can utilize the Magic packet* to wake-up the module. Once the Module has been
enabled for Magic Packet* wake-up and has been put into appropriate state, it scans all incoming packets
addressed to the node for a specific data sequence, which indicates to the controller that this is a Magic
Packet* frame. A Magic Packet* frame must also meet the basic requirements: Destination a Source
a data + CRC. The destination address may be the node ID of the receiving station or a multicast
address, which includes the broadcast address. The specific sequence consists of 16 duplications of the 6-
byte ID registers, with no breaks or interrupts. This sequence can be located anywhere within the packet, but
must be preceded by a synchronization stream, 6 bytes of FFh. The device will also accept a multicast
address, as long as the 16 duplications of the IEEE address match the address of the ID registers. If the
Node ID is 11h 22h 33h 44h 55h 66h, then the magic frame’ s format is like the following:
Destination a source a MISC + FF FF FF FF FF FF + MISC + 11 22 33 44 55 66 + 11 22 33
44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44
55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55
66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + MISC + CRC
An0065. CPU-1450 Soft Power Management
Please refer to Chapter 6 for a practical example using the Magic Packet functionality.