
2
Schematic Checklist
VDDA,
VDD3P3,
VDD3P3_RTC,
VDD3P3_CPU
CHIP_EN
t0
t1
V
IL_nRST
2.8 V
Figure 4: ESP32C3 Family Powerup and Reset Timing
Table 1: Description of ESP32C3 Family Powerup and Reset Timing Parameters
Min
Parameter
Description
(
µ
s)
t
0
Time between bringing up the VDDA, VDD3P3, VDD3P3_RTC, and
VDD3P3_CPU rails, and activating CHIP_EN
50
t
1
Duration of CHIP_EN signal level < V
IL
_
nRST
to reset the chip
50
Notice:
To ensure the power supply to the ESP32-C3 family chip is stable during power-up, it is advised to add an
RC delay circuit at the CHIP_EN pin. The recommended setting for the RC delay circuit is usually R = 10 k
Ω
and C = 1
µ
F. However, specific parameters should be adjusted based on the power-up timing of the power
supply and the power-up and reset sequence timing of the chip.
2.2.2 Reset
CHIP_EN can be used as the reset pin of ESP32-C3 family. When CHIP_EN is at low level, the reset voltage
(V
IL
_
nRST
) should be (–0.3
~
0.25 × VDD) V (where VDD is the I/O voltage for a particular power domain of pins).
To avoid reboots caused by external interference, route the CHIP_EN trace as short as possible, and add a
pull-up resistor as well as a capacitor to ground whenever possible.
Notice:
CHIP_EN pin must not be left floating.
2.3 Flash
ESP32-C3 family can support up to 16 MB external flash. The ESP32-C3-WROOM-02 module uses a 4 MB SPI
flash, powered by VDD_SPI. We recommend reserving a serial resistor (initially of 0
Ω
) on the SPI line, to lower the
driving current, adjust timing, reduce crosstalk and external interference, etc.
Espressif Systems
8
ESP32-C3 Family Hardware Design Guidelines V1.0